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authorYang Zhang <yang.z.zhang@Intel.com>2013-10-04 12:30:09 +0200
committerJan Beulich <jbeulich@suse.com>2013-10-04 12:30:09 +0200
commitc6f92aed0e209df823d2cb5780dbb1ea12fc6d4a (patch)
treeef9f8adf44914b86a82888afe50adf23a04260c2 /xen/include/asm-x86/processor.h
parent1332d0e907fd5b6075241d36257f8faef5ec97a7 (diff)
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Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
Currently, it use hardcode value for IA32_VMX_CR4_FIXED1. This is wrong. We should check guest's cpuid to know which bits are writeable in CR4 by guest and allow the guest to set the corresponding bit only when guest has the feature. Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> Cleanup. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Jun Nakajima <jun.nakajima@intel.com>
Diffstat (limited to 'xen/include/asm-x86/processor.h')
-rw-r--r--xen/include/asm-x86/processor.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index 5cdacc7e4d..893afa3a84 100644
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -87,6 +87,7 @@
#define X86_CR4_PCIDE 0x20000 /* enable PCID */
#define X86_CR4_OSXSAVE 0x40000 /* enable XSAVE/XRSTOR */
#define X86_CR4_SMEP 0x100000/* enable SMEP */
+#define X86_CR4_SMAP 0x200000/* enable SMAP */
/*
* Trap/fault mnemonics.