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author | Keir Fraser <keir.fraser@citrix.com> | 2009-08-05 13:50:36 +0100 |
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committer | Keir Fraser <keir.fraser@citrix.com> | 2009-08-05 13:50:36 +0100 |
commit | 0d22c8d92c6cdc78f8300f55a6360ef9c0bb51a3 (patch) | |
tree | f6b31a451f67cad656f429cff589ef6ee5b3cf3f /xen/include/asm-x86/mtrr.h | |
parent | 37455c343614ded2788380973c0c5334fa6cb796 (diff) | |
download | xen-0d22c8d92c6cdc78f8300f55a6360ef9c0bb51a3.tar.gz xen-0d22c8d92c6cdc78f8300f55a6360ef9c0bb51a3.tar.bz2 xen-0d22c8d92c6cdc78f8300f55a6360ef9c0bb51a3.zip |
x86: CPU synchronization while doing MTRR register update
The current Xen code does not synchronize all the cpus while
initializing MTRR registers when a cpu comes up.=20
As per IA32 SDM vol 3: Section: 10.11.8 MTRR Considerations in MP
Systems, all the processors should be synchronized while updating
MTRRs.
Processors starting with westmere are caching VMCS data for better VMX
performance. These processors also has Hyper-threading support. With
hyper-threading, when one thread's cache is disabled, it also disables
cache for the sibling threads. And MTRR register updating procedure
involves cache disabling. So if cpus are not synchronized, updating
MTRR registers on a thread, results in the VMCS data from sibling
threads becoming inaccessible, and it causes system failure.
With this patch while updating the MTRR registers, all the cpus are
synchronized as per the IA32 SDM. Also at the boot time and resume
time when multiple cpus are brought up, an optimization is added to
delay the MTRR initialization until all the cpus are up, to avoid
multiple times cpu synchronization.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Suresh B Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Asit K Mallick <asit.k.mallick@intel.com>
Diffstat (limited to 'xen/include/asm-x86/mtrr.h')
-rw-r--r-- | xen/include/asm-x86/mtrr.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/xen/include/asm-x86/mtrr.h b/xen/include/asm-x86/mtrr.h index 03285db5bd..8793220a28 100644 --- a/xen/include/asm-x86/mtrr.h +++ b/xen/include/asm-x86/mtrr.h @@ -71,5 +71,9 @@ extern uint8_t epte_get_entry_emt( extern void ept_change_entry_emt_with_range( struct domain *d, unsigned long start_gfn, unsigned long end_gfn); extern unsigned char pat_type_2_pte_flags(unsigned char pat_type); +extern int hold_mtrr_updates_on_aps; +extern void mtrr_aps_sync_begin(void); +extern void mtrr_aps_sync_end(void); +extern void mtrr_bp_restore(void); #endif /* __ASM_X86_MTRR_H__ */ |