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authorKeir Fraser <keir@xensource.com>2007-10-29 16:49:02 +0000
committerKeir Fraser <keir@xensource.com>2007-10-29 16:49:02 +0000
commite33d4a73162dac1fe6861f3a5e96de89e30b6a91 (patch)
tree6426b7d4c5d273bc21191ebf17e616d07bb4f8cb /xen/include/asm-x86/msr.h
parent8fbfe1c9c1c7a954bcb1d6c2142c75196ca2d9cd (diff)
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x86: allow pv guests to disable TSC for applications
Linux, under CONFIG_SECCOMP, has been capable of hiding the TSC from processes for quite a while. This patch enables this to actually work for pv kernels, by allowing them to control CR4.TSD (and, as a simple thing to do at the same time, CR4.DE). Applies cleanly only on top of the previously submitted debug register handling patch. Signed-off-by: Jan Beulich <jbeulich@novell.com> Also clean up CR4 and EFER handling, and hack-n-slash header file inclusion madness to get the tree building again. Signed-off-by: Keir Fraser <keir@xensource.com>
Diffstat (limited to 'xen/include/asm-x86/msr.h')
-rw-r--r--xen/include/asm-x86/msr.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h
index 79d37a33ad..96a078824e 100644
--- a/xen/include/asm-x86/msr.h
+++ b/xen/include/asm-x86/msr.h
@@ -90,16 +90,14 @@ static inline void wrmsrl(unsigned int msr, __u64 val)
: "c" (counter))
-DECLARE_PER_CPU(__u64, efer);
+DECLARE_PER_CPU(u64, efer);
-static inline __u64 read_efer(void)
+static inline u64 read_efer(void)
{
- if (!this_cpu(efer))
- rdmsrl(MSR_EFER, this_cpu(efer));
return this_cpu(efer);
}
-static inline void write_efer(__u64 val)
+static inline void write_efer(u64 val)
{
this_cpu(efer) = val;
wrmsrl(MSR_EFER, val);