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| author | kaf24@scramble.cl.cam.ac.uk <kaf24@scramble.cl.cam.ac.uk> | 2005-03-01 18:59:27 +0000 |
|---|---|---|
| committer | kaf24@scramble.cl.cam.ac.uk <kaf24@scramble.cl.cam.ac.uk> | 2005-03-01 18:59:27 +0000 |
| commit | 40c4769241f5f5025ee105c0657307dc96275085 (patch) | |
| tree | 5c650b8cb3414e9f569d12abf60f691ae2b369f5 /xen/include/asm-x86/msr.h | |
| parent | 59f685563f731a612bbca707e0ad8d3141ab89bd (diff) | |
| download | xen-40c4769241f5f5025ee105c0657307dc96275085.tar.gz xen-40c4769241f5f5025ee105c0657307dc96275085.tar.bz2 xen-40c4769241f5f5025ee105c0657307dc96275085.zip | |
bitkeeper revision 1.1236.1.42 (4224bb8fOnbAClkv82bfZwfayrn5Rw)
Fix error-code generation in rdmsr_user and wrmsr_user.
Signed-off-by: Keir Fraser <keir.fraser@cl.cam.ac.uk>
Diffstat (limited to 'xen/include/asm-x86/msr.h')
| -rw-r--r-- | xen/include/asm-x86/msr.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index dd01e9642a..00d7e69e71 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -12,7 +12,7 @@ : "c" (msr), "a" (val1), "d" (val2)) #define rdmsr_user(msr,val1,val2) ({\ - int _rc = 0; \ + int _rc; \ __asm__ __volatile__( \ "1: rdmsr\n2:\n" \ ".section .fixup,\"ax\"\n" \ @@ -22,12 +22,12 @@ " "__FIXUP_ALIGN"\n" \ " "__FIXUP_WORD" 1b,3b\n" \ ".previous\n" \ - : "=a" (val1), "=d" (val2), "=r" (_rc) \ - : "c" (msr)); \ + : "=a" (val1), "=d" (val2), "=&r" (_rc) \ + : "c" (msr), "2" (0)); \ _rc; }) #define wrmsr_user(msr,val1,val2) ({\ - int _rc = 0; \ + int _rc; \ __asm__ __volatile__( \ "1: wrmsr\n2:\n" \ ".section .fixup,\"ax\"\n" \ @@ -37,8 +37,8 @@ " "__FIXUP_ALIGN"\n" \ " "__FIXUP_WORD" 1b,3b\n" \ ".previous\n" \ - : "=r" (_rc) \ - : "c" (msr), "a" (val1), "d" (val2)); \ + : "=&r" (_rc) \ + : "c" (msr), "a" (val1), "d" (val2), "0" (0)); \ _rc; }) #define rdtsc(low,high) \ |