diff options
author | Liu, Jinsong <jinsong.liu@intel.com> | 2012-09-26 12:04:00 +0200 |
---|---|---|
committer | Liu, Jinsong <jinsong.liu@intel.com> | 2012-09-26 12:04:00 +0200 |
commit | 975b5bdf27031adef6587bb5c92b7a5800e051f1 (patch) | |
tree | e69cf436778fc15c19764cca89c0e164f228fc43 /xen/include/asm-x86/mce.h | |
parent | 8e804aec451a072022eece0980481ab545b5cd75 (diff) | |
download | xen-975b5bdf27031adef6587bb5c92b7a5800e051f1.tar.gz xen-975b5bdf27031adef6587bb5c92b7a5800e051f1.tar.bz2 xen-975b5bdf27031adef6587bb5c92b7a5800e051f1.zip |
x86: vMCE emulation
This patch provides virtual MCE support to guest. It emulates a simple
and clean MCE MSRs interface to guest by faking caps to guest if needed
and masking caps if unnecessary:
1. Providing a well-defined MCG_CAP to guest, filter out un-necessary
caps and provide only guest needed caps;
2. Disabling MCG_CTL to avoid model specific;
3. Sticking all 1's to MCi_CTL to guest to avoid model specific;
4. Enabling CMCI cap but never really inject to guest to prevent
polling periodically;
5. Masking MSCOD field of MCi_STATUS to avoid model specific;
6. Keeping natural semantics by per-vcpu instead of per-domain
variables;
7. Using bank1 and reserving bank0 to work around 'bank0 quirk' of some
very old processors;
8. Cleaning some vMCE# injection logic which shared by Intel and AMD
but useless under new vMCE implement;
9. Keeping compatilbe w/ old xen version which has been backported to
SLES11 SP2, so that old vMCE would not blocked when migrate to new
vMCE;
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
- make printing consistent (and non-exploitable)
- fix return values of intel_mce_{rd,wr}msr() for out of range banks
- miscellaneous cleanup
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Committed-by: Jan Beulich <jbeulich@suse.com>
Diffstat (limited to 'xen/include/asm-x86/mce.h')
-rw-r--r-- | xen/include/asm-x86/mce.h | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/xen/include/asm-x86/mce.h b/xen/include/asm-x86/mce.h index 922c94ac6a..a4eea47782 100644 --- a/xen/include/asm-x86/mce.h +++ b/xen/include/asm-x86/mce.h @@ -3,28 +3,35 @@ #ifndef _XEN_X86_MCE_H #define _XEN_X86_MCE_H -/* This entry is for recording bank nodes for the impacted domain, - * put into impact_header list. */ -struct bank_entry { - struct list_head list; - uint16_t bank; +/* + * Emulate 2 banks for guest + * Bank0: reserved for 'bank0 quirk' occur at some very old processors: + * 1). Intel cpu whose family-model value < 06-1A; + * 2). AMD K7 + * Bank1: used to transfer error info to guest + */ +#define GUEST_MC_BANK_NUM 2 + +/* Filter MSCOD model specific error code to guest */ +#define MCi_STATUS_MSCOD_MASK (~(0xffffULL << 16)) + +/* No mci_ctl since it stick all 1's */ +struct vmce_bank { uint64_t mci_status; uint64_t mci_addr; uint64_t mci_misc; + uint64_t mci_ctl2; }; -struct domain_mca_msrs -{ - /* Guest should not change below values after DOM boot up */ +/* No mcg_ctl since it not expose to guest */ +struct vmce { + uint64_t mcg_cap; uint64_t mcg_status; - uint16_t nr_injection; - struct list_head impact_header; spinlock_t lock; + struct vmce_bank bank[GUEST_MC_BANK_NUM]; }; /* Guest vMCE MSRs virtualization */ -extern int vmce_init_msr(struct domain *d); -extern void vmce_destroy_msr(struct domain *d); extern void vmce_init_vcpu(struct vcpu *); extern int vmce_restore_vcpu(struct vcpu *, uint64_t caps); extern int vmce_wrmsr(uint32_t msr, uint64_t val); |