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author | Boris Ostrovsky <boris.ostrovsky@oracle.com> | 2013-04-15 11:23:25 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2013-04-15 11:23:25 +0200 |
commit | 6f3c6d1ed8d2c8b6cd5d9689159e3647bf428dcd (patch) | |
tree | 6f771541c2c91da817ccde8f03075e2bca76a779 /xen/include/asm-x86/hvm | |
parent | 6a727d6be892ea5ff818446d96974bebdf8ac3a2 (diff) | |
download | xen-6f3c6d1ed8d2c8b6cd5d9689159e3647bf428dcd.tar.gz xen-6f3c6d1ed8d2c8b6cd5d9689159e3647bf428dcd.tar.bz2 xen-6f3c6d1ed8d2c8b6cd5d9689159e3647bf428dcd.zip |
x86/AMD: Allow more fine-grained control of VMCB MSR Permission Map
Currently VMCB's MSRPM can be updated to either intercept both reads and
writes to an MSR or not intercept neither. In some cases we may want to
be more selective and intercept one but not the other.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
Diffstat (limited to 'xen/include/asm-x86/hvm')
-rw-r--r-- | xen/include/asm-x86/hvm/svm/vmcb.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/xen/include/asm-x86/hvm/svm/vmcb.h b/xen/include/asm-x86/hvm/svm/vmcb.h index b7c04046b2..ade4bb2afa 100644 --- a/xen/include/asm-x86/hvm/svm/vmcb.h +++ b/xen/include/asm-x86/hvm/svm/vmcb.h @@ -531,9 +531,13 @@ void svm_destroy_vmcb(struct vcpu *v); void setup_vmcb_dump(void); +#define MSR_INTERCEPT_NONE 0 +#define MSR_INTERCEPT_READ 1 +#define MSR_INTERCEPT_WRITE 2 +#define MSR_INTERCEPT_RW (MSR_INTERCEPT_WRITE | MSR_INTERCEPT_READ) void svm_intercept_msr(struct vcpu *v, uint32_t msr, int enable); -#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), 0) -#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), 1) +#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE) +#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW) /* * VMCB accessor functions. |