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authorZhang Xiantao <xiantao.zhang@intel.com>2013-01-15 11:15:29 +0100
committerZhang Xiantao <xiantao.zhang@intel.com>2013-01-15 11:15:29 +0100
commite3a48bbd60b4178c424c287ad3abeb82f8ae5c1a (patch)
tree2cfeaacdc619f65180cdad1294996918e3c7ee4a /xen/include/asm-x86/hvm/vmx
parent31c1595f59a3099739f60338623900f5f0130f69 (diff)
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nested_ept: Implement guest ept's walker
Implment guest EPT PT walker, some logic is based on shadow's ia32e PT walker. During the PT walking, if the target pages are not in memory, use RETRY mechanism and get a chance to let the target page back. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Tim Deegan <tim@xen.org> Acked-by: Jun Nakajima <jun.nakajima@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com> Committed-by: Jan Beulich <jbeulich@suse.com>
Diffstat (limited to 'xen/include/asm-x86/hvm/vmx')
-rw-r--r--xen/include/asm-x86/hvm/vmx/vmcs.h1
-rw-r--r--xen/include/asm-x86/hvm/vmx/vmx.h31
-rw-r--r--xen/include/asm-x86/hvm/vmx/vvmx.h13
3 files changed, 45 insertions, 0 deletions
diff --git a/xen/include/asm-x86/hvm/vmx/vmcs.h b/xen/include/asm-x86/hvm/vmx/vmcs.h
index 3adffccac8..4e183c4358 100644
--- a/xen/include/asm-x86/hvm/vmx/vmcs.h
+++ b/xen/include/asm-x86/hvm/vmx/vmcs.h
@@ -194,6 +194,7 @@ extern u32 vmx_secondary_exec_control;
extern bool_t cpu_has_vmx_ins_outs_instr_info;
+#define VMX_EPT_EXEC_ONLY_SUPPORTED 0x00000001
#define VMX_EPT_WALK_LENGTH_4_SUPPORTED 0x00000040
#define VMX_EPT_MEMORY_TYPE_UC 0x00000100
#define VMX_EPT_MEMORY_TYPE_WB 0x00004000
diff --git a/xen/include/asm-x86/hvm/vmx/vmx.h b/xen/include/asm-x86/hvm/vmx/vmx.h
index aa5b0809d1..c73946f99f 100644
--- a/xen/include/asm-x86/hvm/vmx/vmx.h
+++ b/xen/include/asm-x86/hvm/vmx/vmx.h
@@ -51,6 +51,22 @@ typedef union {
u64 epte;
} ept_entry_t;
+typedef struct {
+ /*use lxe[0] to save result */
+ ept_entry_t lxe[5];
+} ept_walk_t;
+
+typedef enum {
+ ept_access_n = 0, /* No access permissions allowed */
+ ept_access_r = 1, /* Read only */
+ ept_access_w = 2, /* Write only */
+ ept_access_rw = 3, /* Read & Write */
+ ept_access_x = 4, /* Exec Only */
+ ept_access_rx = 5, /* Read & Exec */
+ ept_access_wx = 6, /* Write & Exec*/
+ ept_access_all = 7, /* Full permissions */
+} ept_access_t;
+
#define EPT_TABLE_ORDER 9
#define EPTE_SUPER_PAGE_MASK 0x80
#define EPTE_MFN_MASK 0xffffffffff000ULL
@@ -60,6 +76,17 @@ typedef union {
#define EPTE_AVAIL1_SHIFT 8
#define EPTE_EMT_SHIFT 3
#define EPTE_IGMT_SHIFT 6
+#define EPTE_RWX_MASK 0x7
+#define EPTE_FLAG_MASK 0x7f
+
+#define EPT_EMT_UC 0
+#define EPT_EMT_WC 1
+#define EPT_EMT_RSV0 2
+#define EPT_EMT_RSV1 3
+#define EPT_EMT_WT 4
+#define EPT_EMT_WP 5
+#define EPT_EMT_WB 6
+#define EPT_EMT_RSV2 7
void vmx_asm_vmexit_handler(struct cpu_user_regs);
void vmx_asm_do_vmentry(void);
@@ -191,6 +218,9 @@ void vmx_update_secondary_exec_control(struct vcpu *v);
extern u64 vmx_ept_vpid_cap;
+#define cpu_has_vmx_ept_exec_only_supported \
+ (vmx_ept_vpid_cap & VMX_EPT_EXEC_ONLY_SUPPORTED)
+
#define cpu_has_vmx_ept_wl4_supported \
(vmx_ept_vpid_cap & VMX_EPT_WALK_LENGTH_4_SUPPORTED)
#define cpu_has_vmx_ept_mt_uc \
@@ -419,6 +449,7 @@ void update_guest_eip(void);
#define _EPT_GLA_FAULT 8
#define EPT_GLA_FAULT (1UL<<_EPT_GLA_FAULT)
+#define EPT_L4_PAGETABLE_SHIFT 39
#define EPT_PAGETABLE_ENTRIES 512
#endif /* __ASM_X86_HVM_VMX_VMX_H__ */
diff --git a/xen/include/asm-x86/hvm/vmx/vvmx.h b/xen/include/asm-x86/hvm/vmx/vvmx.h
index 689e684f06..33d059a31f 100644
--- a/xen/include/asm-x86/hvm/vmx/vvmx.h
+++ b/xen/include/asm-x86/hvm/vmx/vvmx.h
@@ -32,6 +32,10 @@ struct nestedvmx {
unsigned long intr_info;
u32 error_code;
} intr;
+ struct {
+ uint32_t exit_reason;
+ uint32_t exit_qual;
+ } ept_exit;
};
#define vcpu_2_nvmx(v) (vcpu_nestedhvm(v).u.nvmx)
@@ -109,6 +113,11 @@ void nvmx_domain_relinquish_resources(struct domain *d);
int nvmx_handle_vmxon(struct cpu_user_regs *regs);
int nvmx_handle_vmxoff(struct cpu_user_regs *regs);
+#define EPT_TRANSLATE_SUCCEED 0
+#define EPT_TRANSLATE_VIOLATION 1
+#define EPT_TRANSLATE_MISCONFIG 2
+#define EPT_TRANSLATE_RETRY 3
+
int
nvmx_hap_walk_L1_p2m(struct vcpu *v, paddr_t L2_gpa, paddr_t *L1_gpa,
unsigned int *page_order,
@@ -192,5 +201,9 @@ u64 nvmx_get_tsc_offset(struct vcpu *v);
int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs,
unsigned int exit_reason);
+int nept_translate_l2ga(struct vcpu *v, paddr_t l2ga,
+ unsigned int *page_order, uint32_t rwx_acc,
+ unsigned long *l1gfn, uint64_t *exit_qual,
+ uint32_t *exit_reason);
#endif /* __ASM_X86_HVM_VVMX_H__ */