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| author | Jiongxi Li <jiongxi.li@intel.com> | 2013-02-18 09:34:18 +0100 |
|---|---|---|
| committer | Jiongxi Li <jiongxi.li@intel.com> | 2013-02-18 09:34:18 +0100 |
| commit | 825ea023c1fe1c466a5c134cc65e4c95e0874b48 (patch) | |
| tree | 4b8cd3011ad928574a96016f6d87a4a58892036e /xen/include/asm-x86/hvm/vmx | |
| parent | db2ba9286c7171680661e1a6be0e185c38e71b35 (diff) | |
| download | xen-825ea023c1fe1c466a5c134cc65e4c95e0874b48.tar.gz xen-825ea023c1fe1c466a5c134cc65e4c95e0874b48.tar.bz2 xen-825ea023c1fe1c466a5c134cc65e4c95e0874b48.zip | |
x86/VMX: fix VMCS setting for x2APIC mode guest while enabling APICV
The "APIC-register virtualization" and "virtual-interrupt deliver"
VM-execution control has no effect on the behavior of RDMSR/WRMSR if
the "virtualize x2APIC mode" VM-execution control is 0.
When guest uses x2APIC mode, we should enable "virtualize x2APIC mode"
for APICV first.
Signed-off-by: Jiongxi Li <jiongxi.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Jun Nakajima <jun.nakajima@intel.com>
Committed-by: Jan Beulich <jbeulich@suse.com>
Diffstat (limited to 'xen/include/asm-x86/hvm/vmx')
| -rw-r--r-- | xen/include/asm-x86/hvm/vmx/vmcs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/xen/include/asm-x86/hvm/vmx/vmcs.h b/xen/include/asm-x86/hvm/vmx/vmcs.h index db85baa92f..5d9a0b5530 100644 --- a/xen/include/asm-x86/hvm/vmx/vmcs.h +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h @@ -190,6 +190,7 @@ extern u32 vmx_vmentry_control; #define SECONDARY_EXEC_ENABLE_EPT 0x00000002 #define SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING 0x00000004 #define SECONDARY_EXEC_ENABLE_RDTSCP 0x00000008 +#define SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE 0x00000010 #define SECONDARY_EXEC_ENABLE_VPID 0x00000020 #define SECONDARY_EXEC_WBINVD_EXITING 0x00000040 #define SECONDARY_EXEC_UNRESTRICTED_GUEST 0x00000080 @@ -253,6 +254,8 @@ extern bool_t cpu_has_vmx_ins_outs_instr_info; (vmx_secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT) #define cpu_has_vmx_virtual_intr_delivery \ (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) +#define cpu_has_vmx_virtualize_x2apic_mode \ + (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) #define cpu_has_vmx_vmcs_shadowing \ (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VMCS_SHADOWING) @@ -449,6 +452,7 @@ enum vmcs_field { #define MSR_TYPE_R 1 #define MSR_TYPE_W 2 void vmx_disable_intercept_for_msr(struct vcpu *v, u32 msr, int type); +void vmx_enable_intercept_for_msr(struct vcpu *v, u32 msr, int type); int vmx_read_guest_msr(u32 msr, u64 *val); int vmx_write_guest_msr(u32 msr, u64 val); int vmx_add_guest_msr(u32 msr); |