iommu: Fix pirq conflict issue when guest adopts per-cpu vector.

Latest Linux and Windows may adopt per-cpu vector instead of global
vector, so same vector in different vcpu may correspond to different
interrupt sources. That is to say, vector and pirq should be 1:n
mapping, and the array msi_gvec_pirq can't meet the mapping
requirement, so need to improve the related logic, otherwise it may
introduce strange issues.

Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/xen/include/asm-x86/hvm/vlapic.h b/xen/include/asm-x86/hvm/vlapic.h
index 880754d2ab..d882af2d54 100644
--- a/xen/include/asm-x86/hvm/vlapic.h
+++ b/xen/include/asm-x86/hvm/vlapic.h
@@ -52,6 +52,16 @@
 #define vlapic_base_address(vlapic)                             \
     ((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_BASE)
 
+#define VMSI_DEST_ID_MASK 0xff
+#define VMSI_RH_MASK      0x100
+#define VMSI_DM_MASK      0x200
+#define VMSI_DELIV_MASK   0x7000
+#define VMSI_TRIG_MODE    0x8000
+
+#define GFLAGS_SHIFT_RH             8
+#define GLFAGS_SHIFT_DELIV_MODE     12
+#define GLFAGS_SHIFT_TRG_MODE       15
+
 struct vlapic {
     struct hvm_hw_lapic      hw;
     struct hvm_hw_lapic_regs *regs;