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authorJiongxi Li <jiongxi.li@intel.com>2012-09-17 21:05:11 +0100
committerJiongxi Li <jiongxi.li@intel.com>2012-09-17 21:05:11 +0100
commit25b81a7941d71fabd4c8c56e9d3d76801d061842 (patch)
tree70c210788e3b17400e6c8a2a736a0298ec8bacea /xen/include/asm-x86/hvm/vlapic.h
parentf62b02e177cd03da2b8397b9bdf1a53b541df3f3 (diff)
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xen: enable Virtual-interrupt delivery
Virtual interrupt delivery avoids Xen to inject vAPIC interrupts manually, which is fully taken care of by the hardware. This needs some special awareness into existing interrupr injection path: For pending interrupt from vLAPIC, instead of direct injection, we may need update architecture specific indicators before resuming to guest. Before returning to guest, RVI should be updated if any pending IRRs EOI exit bitmap controls whether an EOI write should cause VM-Exit. If set, a trap-like induced EOI VM-Exit is triggered. The approach here is to manipulate EOI exit bitmap based on value of TMR. Level triggered irq requires a hook in vLAPIC EOI write, so that vIOAPIC EOI is triggered and emulated Signed-off-by: Gang Wei <gang.wei@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@intel.com> Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> Committed-by: Keir Fraser <keir@xen.org>
Diffstat (limited to 'xen/include/asm-x86/hvm/vlapic.h')
-rw-r--r--xen/include/asm-x86/hvm/vlapic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/xen/include/asm-x86/hvm/vlapic.h b/xen/include/asm-x86/hvm/vlapic.h
index 1c3212241d..09cb63cef7 100644
--- a/xen/include/asm-x86/hvm/vlapic.h
+++ b/xen/include/asm-x86/hvm/vlapic.h
@@ -100,6 +100,7 @@ int vlapic_accept_pic_intr(struct vcpu *v);
void vlapic_adjust_i8259_target(struct domain *d);
void vlapic_EOI_set(struct vlapic *vlapic);
+void vlapic_handle_EOI_induced_exit(struct vlapic *vlapic, int vector);
int vlapic_ipi(struct vlapic *vlapic, uint32_t icr_low, uint32_t icr_high);