[HVM] Reworked interrupt distribution logic.

TODO:
 1. Fix IO-APIC ID to not conflict with LAPIC IDS.
 2. Fix i8259 device model (seems to work already though!).
 3. Add INTSRC overrides in MPBIOS and ACPI tables so
    that PCI legacy IRQ routing always ends up at an
    IO-APIC input with level trigger. Restricting link
    routing to {5,6,10,11} and setting overrides for all
    four of those would work.

Signed-off-by: Keir Fraser <keir@xensource.com>

1 files changed, 7 insertions, 13 deletions

diff --git a/xen/include/asm-x86/hvm/vioapic.h b/xen/include/asm-x86/hvm/vioapic.h
index 32223341ef..6a934b7b39 100644
--- a/xen/include/asm-x86/hvm/vioapic.h
+++ b/xen/include/asm-x86/hvm/vioapic.h
@@ -1,5 +1,4 @@
 /*
- *
  *  Copyright (C) 2001  MandrakeSoft S.A.
  *
  *    MandrakeSoft S.A.
@@ -32,6 +31,9 @@
 
 #ifdef __ia64__
 #define VIOAPIC_IS_IOSAPIC 1
+#define VIOAPIC_NUM_PINS  24
+#else
+#define VIOAPIC_NUM_PINS  48 /* 16 ISA IRQs, 32 non-legacy PCI IRQS. */
 #endif
 
 #if !VIOAPIC_IS_IOSAPIC
@@ -40,8 +42,6 @@
 #define VIOAPIC_VERSION_ID 0x21 /* IOSAPIC version */
 #endif
 
-#define VIOAPIC_NUM_PINS 24
-
 #define VIOAPIC_EDGE_TRIG  0
 #define VIOAPIC_LEVEL_TRIG 1
 
@@ -58,9 +58,9 @@
 #define VIOAPIC_REG_VERSION 0x01
 #define VIOAPIC_REG_ARB_ID  0x02 /* x86 IOAPIC only */
 
-#define domain_vioapic(d) (&(d)->arch.hvm_domain.vioapic)
+#define domain_vioapic(d) (&(d)->arch.hvm_domain.irq.vioapic)
 #define vioapic_domain(v) (container_of((v), struct domain, \
-                                        arch.hvm_domain.vioapic))
+                                        arch.hvm_domain.irq.vioapic))
 
 union vioapic_redir_entry
 {
@@ -86,19 +86,13 @@ union vioapic_redir_entry
 };
 
 struct vioapic {
-    uint32_t irr;
-    uint32_t irr_xen; /* interrupts forced on by the hypervisor. */
-    uint32_t isr;     /* This is used for level trigger */
-    uint32_t imr;
-    uint32_t ioregsel;
-    uint32_t id;
+    uint32_t ioregsel, id;
     unsigned long base_address;
     union vioapic_redir_entry redirtbl[VIOAPIC_NUM_PINS];
 };
 
 void vioapic_init(struct domain *d);
-void vioapic_set_xen_irq(struct domain *d, int irq, int level);
-void vioapic_set_irq(struct domain *d, int irq, int level);
+void vioapic_irq_positive_edge(struct domain *d, unsigned int irq);
 void vioapic_update_EOI(struct domain *d, int vector);
 
 #endif /* __ASM_X86_HVM_VIOAPIC_H__ */