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| author | Wei Wang <wei.wang2@amd.com> | 2012-01-12 13:50:50 +0100 |
|---|---|---|
| committer | Wei Wang <wei.wang2@amd.com> | 2012-01-12 13:50:50 +0100 |
| commit | 4547137c3e31bae4c6c89d1fad63b1928681715f (patch) | |
| tree | edb20a9aafd04e245b1d62f2f2738a2c6706cfbd /xen/include/asm-x86/amd-iommu.h | |
| parent | 262bb227a4f27d0d18dfd2151798a884967db9b6 (diff) | |
| download | xen-4547137c3e31bae4c6c89d1fad63b1928681715f.tar.gz xen-4547137c3e31bae4c6c89d1fad63b1928681715f.tar.bz2 xen-4547137c3e31bae4c6c89d1fad63b1928681715f.zip | |
amd iommu: Add iommu emulation for hvm guest
ATS device driver that support PASID [1] and PRI [2] capabilites needs
to work with iommu driver in guest OS. We have to expose iommu
functionality to HVM guest, if we want assign ATS device to it. A new
hypervisor mmio handler is added to intercept iommu mmio accesses from
guest.
Signed-off-by: Wei Wang <wei.wang2@amd.com>
[1] http://www.pcisig.com/specifications/pciexpress/specifications/ECN-PASID-ATS-2011-03-31.pdf
[2] http://www.pcisig.com/members/downloads/specifications/iov/ats_r1.1_26Jan09.pdf
Committed-by: Jan Beulich <jbeulich@suse.com>
Diffstat (limited to 'xen/include/asm-x86/amd-iommu.h')
| -rw-r--r-- | xen/include/asm-x86/amd-iommu.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/xen/include/asm-x86/amd-iommu.h b/xen/include/asm-x86/amd-iommu.h index 77afabae42..17546043c7 100644 --- a/xen/include/asm-x86/amd-iommu.h +++ b/xen/include/asm-x86/amd-iommu.h @@ -24,6 +24,7 @@ #include <xen/types.h> #include <xen/list.h> #include <xen/spinlock.h> +#include <xen/tasklet.h> #include <asm/hvm/svm/amd-iommu-defs.h> #define iommu_found() (!list_empty(&amd_iommu_head)) @@ -129,4 +130,55 @@ struct ivrs_mappings *get_ivrs_mappings(u16 seg); int iterate_ivrs_mappings(int (*)(u16 seg, struct ivrs_mappings *)); int iterate_ivrs_entries(int (*)(u16 seg, struct ivrs_mappings *)); +/* iommu tables in guest space */ +struct mmio_reg { + uint32_t lo; + uint32_t hi; +}; + +struct guest_dev_table { + struct mmio_reg reg_base; + uint32_t size; +}; + +struct guest_buffer { + struct mmio_reg reg_base; + struct mmio_reg reg_tail; + struct mmio_reg reg_head; + uint32_t entries; +}; + +struct guest_iommu_msi { + uint8_t vector; + uint8_t dest; + uint8_t dest_mode; + uint8_t delivery_mode; + uint8_t trig_mode; +}; + +/* virtual IOMMU structure */ +struct guest_iommu { + + struct domain *domain; + spinlock_t lock; + bool_t enabled; + + struct guest_dev_table dev_table; + struct guest_buffer cmd_buffer; + struct guest_buffer event_log; + struct guest_buffer ppr_log; + + struct tasklet cmd_buffer_tasklet; + + uint64_t mmio_base; /* MMIO base address */ + + /* MMIO regs */ + struct mmio_reg reg_ctrl; /* MMIO offset 0018h */ + struct mmio_reg reg_status; /* MMIO offset 2020h */ + struct mmio_reg reg_ext_feature; /* MMIO offset 0030h */ + + /* guest interrupt settings */ + struct guest_iommu_msi msi; +}; + #endif /* _ASM_X86_64_AMD_IOMMU_H */ |