amd iommu: use base platform MSI implementation

Given that here, other than for VT-d, the MSI interface gets surfaced
through a normal PCI device, the code should use as much as possible of
the "normal" MSI support code.

Further, the code can (and should) follow the "normal" MSI code in
distinguishing the maskable and non-maskable cases at the IRQ
controller level rather than checking the respective flag in the
individual actors.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Wei Wang <wei.wang2@amd.com>
Acked-by: Keir Fraser <keir@xen.org>

1 files changed, 1 insertions, 3 deletions

diff --git a/xen/include/asm-x86/amd-iommu.h b/xen/include/asm-x86/amd-iommu.h
index 92423e21da..6d043bb314 100644
--- a/xen/include/asm-x86/amd-iommu.h
+++ b/xen/include/asm-x86/amd-iommu.h
@@ -83,6 +83,7 @@ struct amd_iommu {
     u16 seg;
     u16 bdf;
     u16 cap_offset;
+    u8 msi_cap;
     iommu_cap_t cap;
 
     u8 ht_flags;
@@ -101,9 +102,6 @@ struct amd_iommu {
     uint64_t exclusion_base;
     uint64_t exclusion_limit;
 
-    int msi_cap;
-    int maskbit;
-
     int enabled;
     int irq;
 };