xen: arm: handle traps of conditional instructions.

This means handling the HSR.ccvalid field as well as correctly processing the
Thumb If-Then state block in the CPSR correctly which is rather tricky. KVM
provided a useful reference for all this.

I suspect we aren't actually hitting these paths very often since the sorts of
traps we take will not often be conditional so my limited testing may not
actually be exercising these paths very much.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.linaro.org>

1 files changed, 9 insertions, 0 deletions

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 06b0b25572..1a4f8d17da 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -237,6 +237,15 @@ union hsr {
         unsigned long ec:6;    /* Exception Class */
     };
 
+    /* Common to all conditional exception classes (0x0N, except 0x00). */
+    struct hsr_cond {
+        unsigned long iss:20;  /* Instruction Specific Syndrome */
+        unsigned long cc:4;    /* Condition Code */
+        unsigned long ccvalid:1;/* CC Valid */
+        unsigned long len:1;   /* Instruction length */
+        unsigned long ec:6;    /* Exception Class */
+    } cond;
+
     /* reg, reg0, reg1 are 4 bits on AArch32, the fifth bit is sbzp. */
     struct hsr_cp32 {
         unsigned long read:1;  /* Direction */