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authorIan Campbell <ian.campbell@citrix.com>2013-07-29 13:21:03 +0100
committerIan Campbell <ian.campbell@citrix.com>2013-07-29 16:54:51 +0100
commit1d9866b723e8a45f0a2768c79f6a64bffe9e736f (patch)
treed1d148e333e9ce2e85e4da1aeb687ab4c0e8ea8e /xen/include/asm-arm/sysregs.h
parentb98070f1218f855fda80950262840ffbfe3a35cd (diff)
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xen: arm: handle 64-bit system register access traps.
Wire up the vtimer handling to it. Use a simplified version of the 32-bit cp-register macros to have convenient decoding of HSR register values. (simplified because we don't need them for passing to the assembler on 64-bit) Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Diffstat (limited to 'xen/include/asm-arm/sysregs.h')
-rw-r--r--xen/include/asm-arm/sysregs.h56
1 files changed, 56 insertions, 0 deletions
diff --git a/xen/include/asm-arm/sysregs.h b/xen/include/asm-arm/sysregs.h
new file mode 100644
index 0000000000..9c64777a72
--- /dev/null
+++ b/xen/include/asm-arm/sysregs.h
@@ -0,0 +1,56 @@
+#ifndef __ASM_ARM_SYSREGS_H
+#define __ASM_ARM_SYSREGS_H
+
+#ifdef CONFIG_ARM_64
+
+#include <xen/stringify.h>
+
+/* AArch 64 System Register Encodings */
+#define __HSR_SYSREG_c0 0
+#define __HSR_SYSREG_c1 1
+#define __HSR_SYSREG_c2 2
+#define __HSR_SYSREG_c3 3
+#define __HSR_SYSREG_c4 4
+#define __HSR_SYSREG_c5 5
+#define __HSR_SYSREG_c6 6
+#define __HSR_SYSREG_c7 7
+#define __HSR_SYSREG_c8 8
+#define __HSR_SYSREG_c9 9
+#define __HSR_SYSREG_c10 10
+#define __HSR_SYSREG_c11 11
+#define __HSR_SYSREG_c12 12
+#define __HSR_SYSREG_c13 13
+#define __HSR_SYSREG_c14 14
+#define __HSR_SYSREG_c15 15
+
+#define __HSR_SYSREG_0 0
+#define __HSR_SYSREG_1 1
+#define __HSR_SYSREG_2 2
+#define __HSR_SYSREG_3 3
+#define __HSR_SYSREG_4 4
+#define __HSR_SYSREG_5 5
+#define __HSR_SYSREG_6 6
+#define __HSR_SYSREG_7 7
+
+/* These are used to decode traps with HSR.EC==HSR_EC_SYSREG */
+#define HSR_SYSREG(op0,op1,crn,crm,op2) \
+ ((__HSR_SYSREG_##op0) << HSR_SYSREG_OP0_SHIFT) | \
+ ((__HSR_SYSREG_##op1) << HSR_SYSREG_OP1_SHIFT) | \
+ ((__HSR_SYSREG_##crn) << HSR_SYSREG_CRN_SHIFT) | \
+ ((__HSR_SYSREG_##crm) << HSR_SYSREG_CRM_SHIFT) | \
+ ((__HSR_SYSREG_##op2) << HSR_SYSREG_OP2_SHIFT)
+
+#define CNTP_CTL_EL0 HSR_SYSREG(3,3,c14,c2,1)
+#define CNTP_TVAL_EL0 HSR_SYSREG(3,3,c14,c2,0)
+#endif
+
+#endif
+
+/*
+ * Local variables:
+ * mode: C
+ * c-set-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */