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author | Julien Grall <julien.grall@linaro.org> | 2013-08-27 13:13:35 +0100 |
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committer | Ian Campbell <ian.campbell@citrix.com> | 2013-08-27 14:25:43 +0100 |
commit | 1c413bf7f2ff372e00d2d78a8904a0ade2420f0a (patch) | |
tree | 0996cd1428347360d0c5231a56cf4a6340199987 /xen/drivers | |
parent | e15c09f90c6629ef36bf6b4d5534dfc3b0b3de01 (diff) | |
download | xen-1c413bf7f2ff372e00d2d78a8904a0ade2420f0a.tar.gz xen-1c413bf7f2ff372e00d2d78a8904a0ade2420f0a.tar.bz2 xen-1c413bf7f2ff372e00d2d78a8904a0ade2420f0a.zip |
drivers/char: pl011: Enable receive timeout interrupt
The commit 874f76a "PL011: fix reverse logic for interrupt mask register"
introduced regression on the Versatile Express. The board didn't receive
correctly input.
The timeout interrupt may be asserted when the FIFO is not empty, and no futher
data is received over a 32-bit period.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Diffstat (limited to 'xen/drivers')
-rw-r--r-- | xen/drivers/char/pl011.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c index 0e1eb64601..e4bd702f3f 100644 --- a/xen/drivers/char/pl011.c +++ b/xen/drivers/char/pl011.c @@ -140,7 +140,7 @@ static void __init pl011_init_postirq(struct serial_port *port) pl011_write(uart, ICR, OEI|BEI|PEI|FEI); /* Unmask interrupts */ - pl011_write(uart, IMSC, OEI|BEI|PEI|FEI|TXI|RXI); + pl011_write(uart, IMSC, RTI|OEI|BEI|PEI|FEI|TXI|RXI); } static void pl011_suspend(struct serial_port *port) |