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| author | Julien Grall <julien.grall@linaro.org> | 2013-08-01 17:09:26 +0100 |
|---|---|---|
| committer | Ian Campbell <ian.campbell@citrix.com> | 2013-08-05 10:23:15 +0100 |
| commit | 33440c3f60b8922d39ff1bc64ba92f5f8d355e37 (patch) | |
| tree | e52949c6ffdb795780294538dcc1a6c878fb4097 /xen/drivers/char | |
| parent | 56b20c4f5dbfcc612dc7b7fb0a1545ced6e70163 (diff) | |
| download | xen-33440c3f60b8922d39ff1bc64ba92f5f8d355e37.tar.gz xen-33440c3f60b8922d39ff1bc64ba92f5f8d355e37.tar.bz2 xen-33440c3f60b8922d39ff1bc64ba92f5f8d355e37.zip | |
pl011: Move registers' definition in a separate file
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
Diffstat (limited to 'xen/drivers/char')
| -rw-r--r-- | xen/drivers/char/pl011.c | 48 |
1 files changed, 1 insertions, 47 deletions
diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c index 9456f20cf6..fd87e68472 100644 --- a/xen/drivers/char/pl011.c +++ b/xen/drivers/char/pl011.c @@ -28,6 +28,7 @@ #include <asm/device.h> #include <xen/mm.h> #include <xen/vmap.h> +#include <asm/pl011-uart.h> static struct pl011 { unsigned int baud, clock_hz, data_bits, parity, stop_bits; @@ -41,53 +42,6 @@ static struct pl011 { /* bool_t probing, intr_works; */ } pl011_com = {0}; -/* PL011 register addresses */ -#define DR (0x00) -#define RSR (0x04) -#define FR (0x18) -#define ILPR (0x20) -#define IBRD (0x24) -#define FBRD (0x28) -#define LCR_H (0x2c) -#define CR (0x30) -#define IFLS (0x34) -#define IMSC (0x38) -#define RIS (0x3c) -#define MIS (0x40) -#define ICR (0x44) -#define DMACR (0x48) - -/* CR bits */ -#define RXE (1<<9) /* Receive enable */ -#define TXE (1<<8) /* Transmit enable */ -#define UARTEN (1<<0) /* UART enable */ - -/* FR bits */ -#define TXFE (1<<7) /* TX FIFO empty */ -#define RXFE (1<<4) /* RX FIFO empty */ - -/* LCR_H bits */ -#define SPS (1<<7) /* Stick parity select */ -#define FEN (1<<4) /* FIFO enable */ -#define STP2 (1<<3) /* Two stop bits select */ -#define EPS (1<<2) /* Even parity select */ -#define PEN (1<<1) /* Parity enable */ -#define BRK (1<<0) /* Send break */ - -/* Interrupt bits (IMSC, MIS, ICR) */ -#define OEI (1<<10) /* Overrun Error interrupt mask */ -#define BEI (1<<9) /* Break Error interrupt mask */ -#define PEI (1<<8) /* Parity Error interrupt mask */ -#define FEI (1<<7) /* Framing Error interrupt mask */ -#define RTI (1<<6) /* Receive Timeout interrupt mask */ -#define TXI (1<<5) /* Transmit interrupt mask */ -#define RXI (1<<4) /* Receive interrupt mask */ -#define DSRMI (1<<3) /* nUARTDSR Modem interrupt mask */ -#define DCDMI (1<<2) /* nUARTDCD Modem interrupt mask */ -#define CTSMI (1<<1) /* nUARTCTS Modem interrupt mask */ -#define RIMI (1<<0) /* nUARTRI Modem interrupt mask */ -#define ALLI OEI|BEI|PEI|FEI|RTI|TXI|RXI|DSRMI|DCDMI|CTSMI|RIMI - /* These parity settings can be ORed directly into the LCR. */ #define PARITY_NONE (0) #define PARITY_ODD (PEN) |