x86: Fix lapic timer stop issue in deep C state

Local APIC timer may stop at deep C state (C3/C4...) entry/exit. this
patch add the logic that use platform timer (HPET) to reenable local
APIC timer at C state entry/exit.

Signed-off-by: Wei Gang <gang.wei@intel.com>
Signed-off-by: Yu Ke <ke.yu@intel.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>

1 files changed, 4 insertions, 2 deletions

diff --git a/xen/common/timer.c b/xen/common/timer.c
index 0699207132..3aad62526d 100644
--- a/xen/common/timer.c
+++ b/xen/common/timer.c
@@ -35,7 +35,7 @@ struct timers {
 
 static DEFINE_PER_CPU(struct timers, timers);
 
-extern int reprogram_timer(s_time_t timeout);
+DEFINE_PER_CPU(s_time_t, timer_deadline);
 
 /****************************************************************************
  * HEAP OPERATIONS.
@@ -323,8 +323,10 @@ static void timer_softirq_action(void)
         }
 
         ts->running = NULL;
+
+        this_cpu(timer_deadline) = GET_HEAP_SIZE(heap) ? heap[1]->expires : 0;
     }
-    while ( !reprogram_timer(GET_HEAP_SIZE(heap) ? heap[1]->expires : 0) );
+    while ( !reprogram_timer(this_cpu(timer_deadline)) );
 
     spin_unlock_irq(&ts->lock);
 }