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author | Keir Fraser <keir.fraser@citrix.com> | 2008-01-23 14:30:29 +0000 |
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committer | Keir Fraser <keir.fraser@citrix.com> | 2008-01-23 14:30:29 +0000 |
commit | 5979d61397078388d979e71d9092322c57225833 (patch) | |
tree | 7069d01f9bb5f427cd771b798baadaeab7dd110e /xen/arch/x86/x86_emulate.c | |
parent | 06f0612ed5738a6769453facd62ebb7c8127308d (diff) | |
download | xen-5979d61397078388d979e71d9092322c57225833.tar.gz xen-5979d61397078388d979e71d9092322c57225833.tar.bz2 xen-5979d61397078388d979e71d9092322c57225833.zip |
x86_emulate: Emulate FNINIT, FNSTCW, FNSTSW x87 instructions.
Provide new hook ->load_fpu_ctxt() to ensure emulated environment's
FPU state is loaded onto the local processor.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
Diffstat (limited to 'xen/arch/x86/x86_emulate.c')
-rw-r--r-- | xen/arch/x86/x86_emulate.c | 34 |
1 files changed, 32 insertions, 2 deletions
diff --git a/xen/arch/x86/x86_emulate.c b/xen/arch/x86/x86_emulate.c index cb8d40a70e..43f9016624 100644 --- a/xen/arch/x86/x86_emulate.c +++ b/xen/arch/x86/x86_emulate.c @@ -159,7 +159,7 @@ static uint8_t opcode_table[256] = { ByteOp|DstMem|SrcImplicit|ModRM, DstMem|SrcImplicit|ModRM, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, /* 0xD8 - 0xDF */ - 0, 0, 0, 0, 0, 0, 0, 0, + 0, ImplicitOps|ModRM, 0, ImplicitOps|ModRM, 0, ImplicitOps|ModRM, 0, 0, /* 0xE0 - 0xE7 */ ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, @@ -864,7 +864,7 @@ x86_emulate( struct cpu_user_regs _regs = *ctxt->regs; uint8_t b, d, sib, sib_index, sib_base, twobyte = 0, rex_prefix = 0; - uint8_t modrm, modrm_mod = 0, modrm_reg = 0, modrm_rm = 0; + uint8_t modrm = 0, modrm_mod = 0, modrm_reg = 0, modrm_rm = 0; unsigned int op_bytes, def_op_bytes, ad_bytes, def_ad_bytes; #define REPE_PREFIX 1 #define REPNE_PREFIX 2 @@ -2517,6 +2517,36 @@ x86_emulate( break; } + case 0xd9: /* FPU 0xd9 */ + fail_if(ops->load_fpu_ctxt == NULL); + ops->load_fpu_ctxt(ctxt); + fail_if((modrm_reg & 7) != 7); + fail_if(modrm_reg >= 0xc0); + /* fnstcw m2byte */ + ea.bytes = 2; + dst = ea; + asm volatile ( "fnstcw %0" : "=m" (dst.val) ); + break; + + case 0xdb: /* FPU 0xdb */ + fail_if(ops->load_fpu_ctxt == NULL); + ops->load_fpu_ctxt(ctxt); + fail_if(modrm != 0xe3); + /* fninit */ + asm volatile ( "fninit" ); + break; + + case 0xdd: /* FPU 0xdd */ + fail_if(ops->load_fpu_ctxt == NULL); + ops->load_fpu_ctxt(ctxt); + fail_if((modrm_reg & 7) != 7); + fail_if(modrm_reg >= 0xc0); + /* fnstsw m2byte */ + ea.bytes = 2; + dst = ea; + asm volatile ( "fnstsw %0" : "=m" (dst.val) ); + break; + case 0xe0 ... 0xe2: /* loop{,z,nz} */ { int rel = insn_fetch_type(int8_t); int do_jmp = !(_regs.eflags & EFLG_ZF); /* loopnz */ |