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authorJan Beulich <jbeulich@suse.com>2013-03-04 10:20:57 +0100
committerJan Beulich <jbeulich@suse.com>2013-03-04 10:20:57 +0100
commitda46114c1beccf3c5745ce4dbebe6d44bfbd8132 (patch)
tree73b9c476fe178a70c15929c16fe81f86c193ab59 /xen/arch/x86/x86_64/entry.S
parentd463b005bbd6475ed930a302821efe239e1b2cf9 (diff)
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x86: don't rely on __softirq_pending to be the first field in irq_cpustat_t
This is even more so as the field doesn't have a comment to that effect in the structure definition. Once modifying the respective assembly code, also convert the IRQSTAT_shift users to do a 32-bit shift only (as we won't support 48M CPUs any time soon) and use "cmpl" instead of "testl" when checking the field (both reducing code size). Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
Diffstat (limited to 'xen/arch/x86/x86_64/entry.S')
-rw-r--r--xen/arch/x86/x86_64/entry.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S
index 82d9881945..03e352bda3 100644
--- a/xen/arch/x86/x86_64/entry.S
+++ b/xen/arch/x86/x86_64/entry.S
@@ -195,8 +195,8 @@ test_all_events:
cli # tests must not race interrupts
/*test_softirqs:*/
movl VCPU_processor(%rbx),%eax
- shl $IRQSTAT_shift,%rax
- leaq irq_stat(%rip),%rcx
+ shll $IRQSTAT_shift,%eax
+ leaq irq_stat+IRQSTAT_softirq_pending(%rip),%rcx
cmpl $0,(%rcx,%rax,1)
jne process_softirqs
testb $1,VCPU_mce_pending(%rbx)
@@ -643,7 +643,7 @@ handle_ist_exception:
/* Send an IPI to ourselves to cover for the lack of event checking. */
movl VCPU_processor(%rbx),%eax
shll $IRQSTAT_shift,%eax
- leaq irq_stat(%rip),%rcx
+ leaq irq_stat+IRQSTAT_softirq_pending(%rip),%rcx
cmpl $0,(%rcx,%rax,1)
je 1f
movl $EVENT_CHECK_VECTOR,%edi