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authorJan Beulich <jbeulich@suse.com>2013-10-11 09:30:31 +0200
committerJan Beulich <jbeulich@suse.com>2013-10-11 09:30:31 +0200
commit4b46e7be783df641b2889e514e85643febd378c2 (patch)
tree27b7a86cad841a488a8b6f1aaea3fc695efcd859 /xen/arch/x86/setup.c
parentd06a0d715ec1423b6c42141ab1b0ff69a3effb56 (diff)
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x86: use {rd,wr}{fs,gs}base when available
... as being intended to be faster than MSR reads/writes. In the case of emulate_privileged_op() also use these in favor of the cached (but possibly stale) addresses from arch.pv_vcpu. This allows entirely removing the code that was the subject of XSA-67. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Keir Fraser <keir@xen.org>
Diffstat (limited to 'xen/arch/x86/setup.c')
-rw-r--r--xen/arch/x86/setup.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 637f1f97f8..30a4fd6b88 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1264,6 +1264,9 @@ void __init __start_xen(unsigned long mbi_p)
if ( cpu_has_smep )
set_in_cr4(X86_CR4_SMEP);
+ if ( cpu_has_fsgsbase )
+ set_in_cr4(X86_CR4_FSGSBASE);
+
local_irq_enable();
pt_pci_init();