Simplify the Xen genapic code. Many genapic hooks have been

replaced with unconditional static 'sane' implementations.
Functions relating to interrupt/IPI delivery have been
grouped into two sets: physical delivery and logical-flat
delivery. All subarchitectures use physical delivery except
the basic default subarchitecture.

The main behavioural changes are:
 1. Summit no longer uses logical-clustered delivery mode
 2. Physical mode no longer makes any pretence to set the
    LDR sanely. We never deliver interrupts in logical mode
    so this really should not matter.
 3. Sanity checking of phys_cpu_present_map is enabled
    for all subarchitectures. Really we should have a sane
    set of APIC IDs in the system, as we rely on them for
    physical delivery mode.
 4. We enable 'bigsmp' mode on any system with more than
    eight CPUs. The previous xAPIC check was unnecessary,
    since our bigsmp mode uses physical delivery, not
    logical-clustered.

This all obviously needs testing on some big systems.

Signed-off-by: Keir Fraser <keir@xensource.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c
index 0ba9a9e826..fe869222dc 100644
--- a/xen/arch/x86/nmi.c
+++ b/xen/arch/x86/nmi.c
@@ -431,14 +431,14 @@ void nmi_watchdog_tick(struct cpu_user_regs * regs)
  */
 static void do_nmi_trigger(unsigned char key)
 {
-    u32 id = apic_read(APIC_ID);
+    u32 id = GET_APIC_ID(apic_read(APIC_ID));
 
     printk("Triggering NMI on APIC ID %x\n", id);
 
     local_irq_disable();
     apic_wait_icr_idle();
     apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(id));
-    apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_INT_ASSERT);
+    apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_PHYSICAL);
     local_irq_enable();
 }