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| author | Keir Fraser <keir.fraser@citrix.com> | 2010-07-16 13:52:18 +0100 |
|---|---|---|
| committer | Keir Fraser <keir.fraser@citrix.com> | 2010-07-16 13:52:18 +0100 |
| commit | b3625d1e2c5815e6d65a47197bebeae2061153ce (patch) | |
| tree | 0b81045610df333d54d1e17b5d081ca08560b362 /xen/arch/x86/mpparse.c | |
| parent | 1652d36bbe2108109159bf62ec11be2736351c02 (diff) | |
| download | xen-b3625d1e2c5815e6d65a47197bebeae2061153ce.tar.gz xen-b3625d1e2c5815e6d65a47197bebeae2061153ce.tar.bz2 xen-b3625d1e2c5815e6d65a47197bebeae2061153ce.zip | |
ACPI: add support for x2APIC ACPI extensions
All logical processors with APIC ID values of 255 and greater will
have their APIC reported through Processor X2APIC structure (type-9
entry type) and all logical processors with APIC ID less than 255 will
have their APIC reported through legacy Processor Local APIC (type-0
entry type) only. This is the same case even for NMI structure
reporting.
The Processor X2APIC Affinity structure provides the association
between the X2APIC ID of a logical processor and the proximity domain
to which the logical processor belongs.
This patch adds 2 new subtables to MADT and one new subtable to SRAT.
This patch also changes x86_acpiid_to_apicid from u8 to u32 for x2APIC
ID, and changes mp_register_lapic to accept 32-bit id. But there are
still some 8-bit apic id hardcode and assumptions in Xen code, it
needs to be fixed in future.
Signed-off-by: Weidong Han <weidong.han@intel.com>
Diffstat (limited to 'xen/arch/x86/mpparse.c')
| -rw-r--r-- | xen/arch/x86/mpparse.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/xen/arch/x86/mpparse.c b/xen/arch/x86/mpparse.c index 6e173dedac..fe5bdaa7f6 100644 --- a/xen/arch/x86/mpparse.c +++ b/xen/arch/x86/mpparse.c @@ -833,7 +833,7 @@ void __init mp_register_lapic_address ( int __devinit mp_register_lapic ( - u8 id, + u32 id, u8 enabled) { struct mpc_config_processor processor; |