diff options
author | Keir Fraser <keir.fraser@citrix.com> | 2009-11-24 14:43:07 +0000 |
---|---|---|
committer | Keir Fraser <keir.fraser@citrix.com> | 2009-11-24 14:43:07 +0000 |
commit | 7ec2f532303617ff075f595f02fb8ae06f9bf1d5 (patch) | |
tree | 4ca495e338e570058241a6451fbfefac038e17d4 /xen/arch/x86/mpparse.c | |
parent | 24cb0f67eaeb10f34392c423b5159db049f6481e (diff) | |
download | xen-7ec2f532303617ff075f595f02fb8ae06f9bf1d5.tar.gz xen-7ec2f532303617ff075f595f02fb8ae06f9bf1d5.tar.bz2 xen-7ec2f532303617ff075f595f02fb8ae06f9bf1d5.zip |
x86: Add a new physdev_op PHYSDEVOP_setup_gsi for GSI setup.
GSI 0-15 is setup by hypervisor, and GSI > =16 is setup by dom0
this physdev_op PHYSDEVOP_setup_gsi. This patch can help dom0
to get rid of intrusive changes of ioapic.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Diffstat (limited to 'xen/arch/x86/mpparse.c')
-rw-r--r-- | xen/arch/x86/mpparse.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/xen/arch/x86/mpparse.c b/xen/arch/x86/mpparse.c index 33648562ae..fae08764d8 100644 --- a/xen/arch/x86/mpparse.c +++ b/xen/arch/x86/mpparse.c @@ -1122,7 +1122,7 @@ int mp_register_gsi (u32 gsi, int triggering, int polarity) ioapic = mp_find_ioapic(gsi); if (ioapic < 0) { printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); - return gsi; + return -EINVAL; } ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; @@ -1141,12 +1141,12 @@ int mp_register_gsi (u32 gsi, int triggering, int polarity) printk(KERN_ERR "Invalid reference to IOAPIC pin " "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, ioapic_pin); - return gsi; + return -EINVAL; } if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) { Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", mp_ioapic_routing[ioapic].apic_id, ioapic_pin); - return gsi_to_irq[gsi]; + return -EEXIST; } mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit); @@ -1180,14 +1180,13 @@ int mp_register_gsi (u32 gsi, int triggering, int polarity) gsi_to_irq[irq] = gsi; } else { printk(KERN_ERR "GSI %u is too high\n", gsi); - return gsi; + return -E2BIG; } } - io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, + return io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, polarity == ACPI_ACTIVE_HIGH ? 0 : 1); - return gsi; } #endif /* CONFIG_X86_IO_APIC */ |