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authorJan Beulich <jbeulich@suse.com>2011-09-22 18:31:02 +0100
committerJan Beulich <jbeulich@suse.com>2011-09-22 18:31:02 +0100
commit1f6bf99c22ce2e13d09e24431688679a96be36a0 (patch)
treef9690a0d348fc1a0c90e77c284259391080e06c5 /xen/arch/x86/io_apic.c
parente463d3619896fc257906d08d0a2b40474ea19e80 (diff)
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x86: IO-APIC code has no dependency on PCI
The IRQ handling code requires pcidevs_lock to be held only for MSI interrupts. As the handling of which was now fully moved into msi.c (i.e. while applying fine without, the patch needs to be applied after the one titled "x86: split MSI IRQ chip"), io_apic.c now also doesn't need to include PCI headers anymore. Signed-off-by: Jan Beulich <jbeulich@suse.com>
Diffstat (limited to 'xen/arch/x86/io_apic.c')
-rw-r--r--xen/arch/x86/io_apic.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index a7081570ca..b0249c5329 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -27,8 +27,6 @@
#include <xen/delay.h>
#include <xen/sched.h>
#include <xen/acpi.h>
-#include <xen/pci.h>
-#include <xen/pci_regs.h>
#include <xen/keyhandler.h>
#include <asm/mc146818rtc.h>
#include <asm/smp.h>
@@ -2491,12 +2489,10 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
add_pin_to_irq(irq, apic, pin);
}
- spin_lock(&pcidevs_lock);
spin_lock(&dom0->event_lock);
ret = map_domain_pirq(dom0, pirq, irq,
MAP_PIRQ_TYPE_GSI, NULL);
spin_unlock(&dom0->event_lock);
- spin_unlock(&pcidevs_lock);
if ( ret < 0 )
return ret;