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author | Yang Zhang <yang.z.zhang@Intel.com> | 2013-09-10 16:41:35 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2013-09-10 16:41:35 +0200 |
commit | f3a4eb9253826d1e49e682314c8666b28fa0b717 (patch) | |
tree | 6ea173e30ff137782d8474b97f3dc75153e97dfb /xen/arch/x86/hvm | |
parent | ef0ea8c2bbb3718df1dee8f15ff3206bf592b253 (diff) | |
download | xen-f3a4eb9253826d1e49e682314c8666b28fa0b717.tar.gz xen-f3a4eb9253826d1e49e682314c8666b28fa0b717.tar.bz2 xen-f3a4eb9253826d1e49e682314c8666b28fa0b717.zip |
Nested VMX: Clear bit 31 of IA32_VMX_BASIC MSR
The bit 31 of revision_id will set to 1 if vmcs shadowing enabled. And
according intel SDM, the bit 31 of IA32_VMX_BASIC MSR is always 0. So we
cannot set low 32 bit of IA32_VMX_BASIC to revision_id directly. Must clear
the bit 31 to 0.
Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Diffstat (limited to 'xen/arch/x86/hvm')
-rw-r--r-- | xen/arch/x86/hvm/vmx/vvmx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index 5ef5ad7385..f385c02282 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1826,7 +1826,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) switch (msr) { case MSR_IA32_VMX_BASIC: data = (host_data & (~0ul << 32)) | - ((v->arch.hvm_vmx.vmcs)->vmcs_revision_id); + (v->arch.hvm_vmx.vmcs->vmcs_revision_id & 0x7fffffff); break; case MSR_IA32_VMX_PINBASED_CTLS: case MSR_IA32_VMX_TRUE_PINBASED_CTLS: |