[HVM] Reworked interrupt distribution logic.

TODO:
 1. Fix IO-APIC ID to not conflict with LAPIC IDS.
 2. Fix i8259 device model (seems to work already though!).
 3. Add INTSRC overrides in MPBIOS and ACPI tables so
    that PCI legacy IRQ routing always ends up at an
    IO-APIC input with level trigger. Restricting link
    routing to {5,6,10,11} and setting overrides for all
    four of those would work.

Signed-off-by: Keir Fraser <keir@xensource.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 843a9232bf..ad216b4e44 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -4,11 +4,12 @@ subdir-y += vmx
 obj-y += hvm.o
 obj-y += i8254.o
 obj-y += i8259.o
-obj-y += rtc.o
-obj-y += pmtimer.o
 obj-y += instrlen.o
 obj-y += intercept.o
 obj-y += io.o
+obj-y += irq.o
 obj-y += platform.o
+obj-y += pmtimer.o
+obj-y += rtc.o
 obj-y += vioapic.o
 obj-y += vlapic.o