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author | Keir Fraser <keir@xensource.com> | 2007-10-29 16:49:02 +0000 |
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committer | Keir Fraser <keir@xensource.com> | 2007-10-29 16:49:02 +0000 |
commit | e33d4a73162dac1fe6861f3a5e96de89e30b6a91 (patch) | |
tree | 6426b7d4c5d273bc21191ebf17e616d07bb4f8cb /xen/arch/x86/flushtlb.c | |
parent | 8fbfe1c9c1c7a954bcb1d6c2142c75196ca2d9cd (diff) | |
download | xen-e33d4a73162dac1fe6861f3a5e96de89e30b6a91.tar.gz xen-e33d4a73162dac1fe6861f3a5e96de89e30b6a91.tar.bz2 xen-e33d4a73162dac1fe6861f3a5e96de89e30b6a91.zip |
x86: allow pv guests to disable TSC for applications
Linux, under CONFIG_SECCOMP, has been capable of hiding the TSC from
processes for quite a while. This patch enables this to actually work
for pv kernels, by allowing them to control CR4.TSD (and, as a simple
thing to do at the same time, CR4.DE).
Applies cleanly only on top of the previously submitted debug register
handling patch.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Also clean up CR4 and EFER handling, and hack-n-slash header file
inclusion madness to get the tree building again.
Signed-off-by: Keir Fraser <keir@xensource.com>
Diffstat (limited to 'xen/arch/x86/flushtlb.c')
-rw-r--r-- | xen/arch/x86/flushtlb.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c index cb0fbb7580..5a012d4a0d 100644 --- a/xen/arch/x86/flushtlb.c +++ b/xen/arch/x86/flushtlb.c @@ -83,9 +83,12 @@ void write_cr3(unsigned long cr3) hvm_flush_guest_tlbs(); #ifdef USER_MAPPINGS_ARE_GLOBAL - __pge_off(); - asm volatile ( "mov %0, %%cr3" : : "r" (cr3) : "memory" ); - __pge_on(); + { + unsigned long cr4 = read_cr4(); + write_cr4(cr4 & ~X86_CR4_PGE); + asm volatile ( "mov %0, %%cr3" : : "r" (cr3) : "memory" ); + write_cr4(cr4); + } #else asm volatile ( "mov %0, %%cr3" : : "r" (cr3) : "memory" ); #endif @@ -124,8 +127,7 @@ void flush_area_local(const void *va, unsigned int flags) hvm_flush_guest_tlbs(); #ifndef USER_MAPPINGS_ARE_GLOBAL - if ( !(flags & FLUSH_TLB_GLOBAL) || - !(mmu_cr4_features & X86_CR4_PGE) ) + if ( !(flags & FLUSH_TLB_GLOBAL) || !(read_cr4() & X86_CR4_PGE) ) { asm volatile ( "mov %0, %%cr3" : : "r" (read_cr3()) : "memory" ); @@ -133,9 +135,10 @@ void flush_area_local(const void *va, unsigned int flags) else #endif { - __pge_off(); + unsigned long cr4 = read_cr4(); + write_cr4(cr4 & ~X86_CR4_PGE); barrier(); - __pge_on(); + write_cr4(cr4); } post_flush(t); |