printk: prefer %#x et at over 0x%x

Performance is not an issue with printk(), so let the function do
minimally more work and instead save a byte per affected format
specifier.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>

4 files changed, 14 insertions, 15 deletions

diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index d0c4fc2160..5e32e9b250 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -1147,7 +1147,7 @@ static int x86_mc_msrinject_verify(struct xen_mc_msrinject *mci)
         }
 
         if (reason != NULL) {
-            printk("HV MSR INJECT ERROR: MSR 0x%llx %s\n",
+            printk("HV MSR INJECT ERROR: MSR %#Lx %s\n",
                    (unsigned long long)mci->mcinj_msr[i].reg, reason);
             errs++;
         }
@@ -1191,8 +1191,7 @@ static void x86_mc_msrinject(void *data)
 
     for (i = 0, msr = &mci->mcinj_msr[0];
          i < mci->mcinj_count; i++, msr++) {
-        printk("HV MSR INJECT (%s) target %u actual %u MSR 0x%llx "
-               "<-- 0x%llx\n",
+        printk("HV MSR INJECT (%s) target %u actual %u MSR %#Lx <-- %#Lx\n",
                intpose ?  "interpose" : "hardware",
                mci->mcinj_cpunr, smp_processor_id(),
                (unsigned long long)msr->reg,
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index 47c1946633..d5c63d8ec7 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -88,7 +88,7 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
     case MSR_IA32_MC0_CTL:
         /* stick all 1's to MCi_CTL */
         *val = ~0UL;
-        mce_printk(MCE_VERBOSE, "MCE: rdmsr MC%u_CTL 0x%"PRIx64"\n",
+        mce_printk(MCE_VERBOSE, "MCE: rdmsr MC%u_CTL %#"PRIx64"\n",
                    bank, *val);
         break;
     case MSR_IA32_MC0_STATUS:
@@ -102,7 +102,7 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
                 *val = entry->mci_status;
                 mce_printk(MCE_VERBOSE,
                            "MCE: rd MC%u_STATUS in vMCE# context "
-                           "value 0x%"PRIx64"\n", bank, *val);
+                           "value %#"PRIx64"\n", bank, *val);
             }
         }
         break;
@@ -116,7 +116,7 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
                 *val = entry->mci_addr;
                 mce_printk(MCE_VERBOSE,
                            "MCE: rdmsr MC%u_ADDR in vMCE# context "
-                           "0x%"PRIx64"\n", bank, *val);
+                           "%#"PRIx64"\n", bank, *val);
             }
         }
         break;
@@ -130,7 +130,7 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
                 *val = entry->mci_misc;
                 mce_printk(MCE_VERBOSE,
                            "MCE: rd MC%u_MISC in vMCE# context "
-                           "0x%"PRIx64"\n", bank, *val);
+                           "%#"PRIx64"\n", bank, *val);
             }
         }
         break;
@@ -171,18 +171,18 @@ int vmce_rdmsr(uint32_t msr, uint64_t *val)
         *val = vmce->mcg_status;
         if (*val)
             mce_printk(MCE_VERBOSE,
-                       "MCE: rdmsr MCG_STATUS 0x%"PRIx64"\n", *val);
+                       "MCE: rdmsr MCG_STATUS %#"PRIx64"\n", *val);
         break;
     case MSR_IA32_MCG_CAP:
         *val = cur->arch.mcg_cap;
-        mce_printk(MCE_VERBOSE, "MCE: rdmsr MCG_CAP 0x%"PRIx64"\n",
+        mce_printk(MCE_VERBOSE, "MCE: rdmsr MCG_CAP %#"PRIx64"\n",
                    *val);
         break;
     case MSR_IA32_MCG_CTL:
         /* Stick all 1's when CTL support, and 0's when no CTL support */
         if ( cur->arch.mcg_cap & MCG_CTL_P )
             *val = ~0ULL;
-        mce_printk(MCE_VERBOSE, "MCE: rdmsr MCG_CTL 0x%"PRIx64"\n", *val);
+        mce_printk(MCE_VERBOSE, "MCE: rdmsr MCG_CTL %#"PRIx64"\n", *val);
         break;
     default:
         ret = mce_bank_msr(cur, msr) ? bank_mce_rdmsr(cur, msr, val) : 0;
diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c
index 0f6c6b1b0c..aa5399be00 100644
--- a/xen/arch/x86/cpu/mtrr/generic.c
+++ b/xen/arch/x86/cpu/mtrr/generic.c
@@ -410,7 +410,7 @@ int generic_validate_add_page(unsigned long base, unsigned long size, unsigned i
 	    boot_cpu_data.x86_model == 1 &&
 	    boot_cpu_data.x86_mask <= 7) {
 		if (base & ((1 << (22 - PAGE_SHIFT)) - 1)) {
-			printk(KERN_WARNING "mtrr: base(0x%lx000) is not 4 MiB aligned\n", base);
+			printk(KERN_WARNING "mtrr: base(%#lx000) is not 4 MiB aligned\n", base);
 			return -EINVAL;
 		}
 		if (!(base + size < 0x70000 || base > 0x7003F) &&
@@ -427,7 +427,7 @@ int generic_validate_add_page(unsigned long base, unsigned long size, unsigned i
 	for (lbase = base; !(lbase & 1) && (last & 1);
 	     lbase = lbase >> 1, last = last >> 1) ;
 	if (lbase != last) {
-		printk(KERN_WARNING "mtrr: base(0x%lx000) is not aligned on a size(0x%lx000) boundary\n",
+		printk(KERN_WARNING "mtrr: base(%#lx000) is not aligned on a size(%#lx000) boundary\n",
 		       base, size);
 		return -EINVAL;
 	}
diff --git a/xen/arch/x86/cpu/mtrr/main.c b/xen/arch/x86/cpu/mtrr/main.c
index fab3a5cf2b..a201d72b6d 100644
--- a/xen/arch/x86/cpu/mtrr/main.c
+++ b/xen/arch/x86/cpu/mtrr/main.c
@@ -366,8 +366,8 @@ int mtrr_add_page(unsigned long base, unsigned long size,
 					continue;
 			}
 			printk(KERN_WARNING
-			       "mtrr: 0x%lx000,0x%lx000 overlaps existing"
-			       " 0x%lx000,0x%lx000\n", base, size, lbase,
+			       "mtrr: %#lx000,%#lx000 overlaps existing"
+			       " %#lx000,%#lx000\n", base, size, lbase,
 			       lsize);
 			goto out;
 		}
@@ -412,7 +412,7 @@ static int mtrr_check(unsigned long base, unsigned long size)
 		printk(KERN_WARNING
 			"mtrr: size and base must be multiples of 4 kiB\n");
 		printk(KERN_DEBUG
-			"mtrr: size: 0x%lx  base: 0x%lx\n", size, base);
+			"mtrr: size: %#lx  base: %#lx\n", size, base);
 		dump_stack();
 		return -1;
 	}