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authorKeir Fraser <keir.fraser@citrix.com>2009-06-16 14:19:34 +0100
committerKeir Fraser <keir.fraser@citrix.com>2009-06-16 14:19:34 +0100
commitc133cc38e21d21f36ae62685e7e64d3e07542814 (patch)
tree3b36b0780eaf83e39e8e7b37a6acd26c328e97f5 /xen/arch/x86/boot
parent50f27130b5c3fe5f5f6c7faaf500f6fe5521b8b9 (diff)
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x86: fix s3 resume on AMD CPUs
Avoid longjmp as it has different semantics than on Intel CPUs in long mode. Also add a few comments and remove a pointless reload of DS. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> Signed-off-by: Keir Fraser <keir.fraser@eu.citrix.com>
Diffstat (limited to 'xen/arch/x86/boot')
-rw-r--r--xen/arch/x86/boot/wakeup.S21
1 files changed, 7 insertions, 14 deletions
diff --git a/xen/arch/x86/boot/wakeup.S b/xen/arch/x86/boot/wakeup.S
index cf40d8bfaa..db367995ab 100644
--- a/xen/arch/x86/boot/wakeup.S
+++ b/xen/arch/x86/boot/wakeup.S
@@ -110,6 +110,7 @@ video_flags: .long 0
# Add offset for any reference to xen specific symbols
wakeup_32:
+ /* Set up segment registers and initial stack for protected mode */
mov $BOOT_DS, %eax
mov %eax, %ds
mov %eax, %ss
@@ -152,6 +153,7 @@ wakeup_32:
wbinvd
+ /* Enable paging and flush prefetch queue */
mov $0x80050033,%eax /* hi-to-lo: PG,AM,WP,NE,ET,MP,PE */
mov %eax,%cr0
jmp 1f
@@ -163,31 +165,22 @@ wakeup_32:
ljmp $BOOT_CS64, $bootsym_phys(wakeup_64)
.code64
- .align 8
- .word 0,0,0
-lgdt_descr:
- .word LAST_RESERVED_GDT_BYTE
- .quad boot_cpu_gdt_table - FIRST_RESERVED_GDT_BYTE
-
wakeup_64:
- lgdt lgdt_descr(%rip)
- mov $(__HYPERVISOR_DS64), %eax
- mov %eax, %ds
-
- # long jump to return point, with cs reload
- rex64 ljmp *ret_point(%rip)
+ /* Jump to high mappings and the higher-level wakeup code. */
+ movq ret_point(%rip), %rbx
+ jmp *%rbx
- .align 8
ret_point:
.quad __ret_point
- .word __HYPERVISOR_CS64
#else /* !defined(__x86_64__) */
+
lgdt gdt_descr
mov $(__HYPERVISOR_DS), %eax
mov %eax, %ds
ljmp $(__HYPERVISOR_CS), $__ret_point
+
#endif
bogus_saved_magic: