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author | Boris Ostrovsky <boris.ostrovsky@amd.com> | 2012-03-06 15:51:33 +0100 |
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committer | Boris Ostrovsky <boris.ostrovsky@amd.com> | 2012-03-06 15:51:33 +0100 |
commit | a8c276790d4f3e7936ef80892c991c0ab10505eb (patch) | |
tree | 347dedb337389db42a52ecaf4bac6894ed5d96d0 /xen/arch/x86/acpi | |
parent | 132531885a247283fcb2dd6c463fc7fa30889118 (diff) | |
download | xen-a8c276790d4f3e7936ef80892c991c0ab10505eb.tar.gz xen-a8c276790d4f3e7936ef80892c991c0ab10505eb.tar.bz2 xen-a8c276790d4f3e7936ef80892c991c0ab10505eb.zip |
x86: Use deep C states for off-lined CPUs
Currently when a core is taken off-line it is placed in C1 state (unless
MONITOR/MWAIT is used). This patch allows a core to go to deeper C states
resulting in significantly higher power savings.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
Committed-by: Jan Beulich <jbeulich@suse.com>
Diffstat (limited to 'xen/arch/x86/acpi')
-rw-r--r-- | xen/arch/x86/acpi/cpu_idle.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c index 0102b6329e..90168548bc 100644 --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -602,6 +602,23 @@ static void acpi_dead_idle(void) __mwait(cx->address, 0); } } + else if ( current_cpu_data.x86_vendor == X86_VENDOR_AMD && + cx->entry_method == ACPI_CSTATE_EM_SYSIO ) + { + /* Intel prefers not to use SYSIO */ + + /* Avoid references to shared data after the cache flush */ + u32 address = cx->address; + u32 pmtmr_ioport_local = pmtmr_ioport; + + wbinvd(); + + while ( 1 ) + { + inb(address); + inl(pmtmr_ioport_local); + } + } default_halt: for ( ; ; ) |