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| author | Jan Beulich <jbeulich@suse.com> | 2013-10-11 09:30:31 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2013-10-11 09:30:31 +0200 |
| commit | 4b46e7be783df641b2889e514e85643febd378c2 (patch) | |
| tree | 27b7a86cad841a488a8b6f1aaea3fc695efcd859 /xen/arch/x86/acpi/suspend.c | |
| parent | d06a0d715ec1423b6c42141ab1b0ff69a3effb56 (diff) | |
| download | xen-4b46e7be783df641b2889e514e85643febd378c2.tar.gz xen-4b46e7be783df641b2889e514e85643febd378c2.tar.bz2 xen-4b46e7be783df641b2889e514e85643febd378c2.zip | |
x86: use {rd,wr}{fs,gs}base when available
... as being intended to be faster than MSR reads/writes.
In the case of emulate_privileged_op() also use these in favor of the
cached (but possibly stale) addresses from arch.pv_vcpu. This allows
entirely removing the code that was the subject of XSA-67.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Diffstat (limited to 'xen/arch/x86/acpi/suspend.c')
| -rw-r--r-- | xen/arch/x86/acpi/suspend.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/xen/arch/x86/acpi/suspend.c b/xen/arch/x86/acpi/suspend.c index c690b45345..9c3cf38fe5 100644 --- a/xen/arch/x86/acpi/suspend.c +++ b/xen/arch/x86/acpi/suspend.c @@ -27,8 +27,8 @@ void save_rest_processor_state(void) asm volatile ( "movw %%ds,(%0); movw %%es,2(%0); movw %%fs,4(%0); movw %%gs,6(%0)" : : "r" (saved_segs) : "memory" ); - rdmsrl(MSR_FS_BASE, saved_fs_base); - rdmsrl(MSR_GS_BASE, saved_gs_base); + saved_fs_base = rdfsbase(); + saved_gs_base = rdgsbase(); rdmsrl(MSR_SHADOW_GS_BASE, saved_kernel_gs_base); rdmsrl(MSR_CSTAR, saved_cstar); rdmsrl(MSR_LSTAR, saved_lstar); @@ -56,8 +56,8 @@ void restore_rest_processor_state(void) X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_TF, 0U); - wrmsrl(MSR_FS_BASE, saved_fs_base); - wrmsrl(MSR_GS_BASE, saved_gs_base); + wrfsbase(saved_fs_base); + wrgsbase(saved_gs_base); wrmsrl(MSR_SHADOW_GS_BASE, saved_kernel_gs_base); if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL || |