diff options
| author | kfraser@localhost.localdomain <kfraser@localhost.localdomain> | 2007-02-26 17:05:10 +0000 |
|---|---|---|
| committer | kfraser@localhost.localdomain <kfraser@localhost.localdomain> | 2007-02-26 17:05:10 +0000 |
| commit | 9f60d763169aca08e416511c25b49a0f89627b26 (patch) | |
| tree | a3e9738c23d1858e8200da01d2427e2bac61e619 /tools/xentrace/formats | |
| parent | 7998832e812ab453e5373d8e63c0afa164fcddfe (diff) | |
| download | xen-9f60d763169aca08e416511c25b49a0f89627b26.tar.gz xen-9f60d763169aca08e416511c25b49a0f89627b26.tar.bz2 xen-9f60d763169aca08e416511c25b49a0f89627b26.zip | |
Missing files from previous changeset.
Signed-off-by: Thomas Friebel <thomas.friebel@amd.com>
Diffstat (limited to 'tools/xentrace/formats')
| -rw-r--r-- | tools/xentrace/formats | 48 |
1 files changed, 22 insertions, 26 deletions
diff --git a/tools/xentrace/formats b/tools/xentrace/formats index ca56b1c902..f98d3f57bd 100644 --- a/tools/xentrace/formats +++ b/tools/xentrace/formats @@ -16,29 +16,25 @@ 0x0002f00c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) t_timer_fn 0x0002f00d CPU%(cpu)d %(tsc)d (+%(reltsc)8d) dom_timer_fn -0x00080001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMX_VMEXIT [ domid = 0x%(1)08x, eip = 0x%(2)08x, reason = 0x%(3)08x ] -0x00084001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMX_INTR [ domid = 0x%(1)08x, trap = 0x%(2)08x, va = 0x%(3)08x ] - -0x00081001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_0 0x%(1)08x 0x%(2)08x 0x%(3)08x -0x00082001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_0 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x - -0x00081002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_1 0x%(1)08x 0x%(2)08x 0x%(3)08x -0x00082002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_1 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x - -0x00081003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_2 0x%(1)08x 0x%(2)08x 0x%(3)08x -0x00082003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_2 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x - -0x00081004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_3 0x%(1)08x 0x%(2)08x 0x%(3)08x -0x00082004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_3 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x - -0x00081005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_4 0x%(1)08x 0x%(2)08x 0x%(3)08x -0x00082005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_4 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x - -0x00081006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_5 0x%(1)08x 0x%(2)08x 0x%(3)08x -0x00082006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_5 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x - -0x00081007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_6 0x%(1)08x 0x%(2)08x 0x%(3)08x -0x00082007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_6 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x - -0x00081008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_7 0x%(1)08x 0x%(2)08x 0x%(3)08x -0x00082008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_7 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x +0x00081001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY [ dom:vcpu = 0x%(1)08x ] +0x00081002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT [ dom:vcpu = 0x%(1)08x, rIP = 0x%(2)08x, exitcode = 0x%(3)08x ] +0x00082001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_XEN [ dom:vcpu = 0x%(1)08x, virt = 0x%(2)08x, errorcode = 0x%(3)02x ] +0x00082002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_INJECT [ dom:vcpu = 0x%(1)08x, virt = 0x%(2)08x, errorcode = 0x%(3)02x ] +0x00082003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INJ_EXC [ dom:vcpu = 0x%(1)08x, vector = 0x%(2)02x, errorcode = 0x%(3)04x ] +0x00082004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INJ_VIRQ [ dom:vcpu = 0x%(1)08x, vector = 0x%(2)02x, fake = %(3)d ] +0x00082005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) REINJ_VIRQ [ dom:vcpu = 0x%(1)08x, vector = 0x%(2)02x ] +0x00082006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_READ [ dom:vcpu = 0x%(1)08x, port = 0x%(2)04x, size = %(3)d ] +0x00082007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_WRITE [ dom:vcpu = 0x%(1)08x, port = 0x%(2)04x, size = %(3)d ] +0x00082008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_READ [ dom:vcpu = 0x%(1)08x, CR# = %(2)d, value = 0x%(3)08x ] +0x00082009 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_WRITE [ dom:vcpu = 0x%(1)08x, CR# = %(2)d, value = 0x%(3)08x ] +0x0008200A CPU%(cpu)d %(tsc)d (+%(reltsc)8d) DR_READ [ dom:vcpu = 0x%(1)08x ] +0x0008200B CPU%(cpu)d %(tsc)d (+%(reltsc)8d) DR_WRITE [ dom:vcpu = 0x%(1)08x ] +0x0008200C CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MSR_READ [ dom:vcpu = 0x%(1)08x, MSR# = 0x%(2)08x, value = 0x%(3)08x ] +0x0008200D CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MSR_WRITE [ dom:vcpu = 0x%(1)08x, MSR# = 0x%(2)08x, value = 0x%(3)08x ] +0x0008200E CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CPUID [ dom:vcpu = 0x%(1)08x, func = 0x%(2)08x, eax:ebx = 0x%(3)016x, ecx:edx = 0x%(4)016x ] +0x0008200F CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INTR [ dom:vcpu = 0x%(1)08x, vector = 0x%(2)02x ] +0x00082010 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) NMI [ dom:vcpu = 0x%(1)08x ] +0x00082011 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) SMI [ dom:vcpu = 0x%(1)08x ] +0x00082012 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMMCALL [ dom:vcpu = 0x%(1)08x, func = 0x%(2)08x ] +0x00082013 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) HLT [ dom:vcpu = 0x%(1)08x, intpending = %(2)d ] +0x00082014 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INVLPG [ dom:vcpu = 0x%(1)08x, virt = 0x%(2)08x, invlpga = %(3)d, asid = 0x%(4)02x ] |