aboutsummaryrefslogtreecommitdiffstats
path: root/tools/xentrace/formats
diff options
context:
space:
mode:
authorkfraser@localhost.localdomain <kfraser@localhost.localdomain>2007-02-23 16:36:55 +0000
committerkfraser@localhost.localdomain <kfraser@localhost.localdomain>2007-02-23 16:36:55 +0000
commit07a46fde3570d9bb47a988e87259de229f437215 (patch)
treec0dc06339eb914d7df01cfe26529496b492813ed /tools/xentrace/formats
parent634febdae7bb9324aa817d6e4cbe02134354cfbb (diff)
downloadxen-07a46fde3570d9bb47a988e87259de229f437215.tar.gz
xen-07a46fde3570d9bb47a988e87259de229f437215.tar.bz2
xen-07a46fde3570d9bb47a988e87259de229f437215.zip
xentrace: Add a relative TSC field (kept track per CPU) to xentrace_format.
Additionally a default line is added (key 0x00000000) which is used when no specific entry in the format file is found. Signed-off-by: Thomas Friebel <thomas.friebel@amd.com>
Diffstat (limited to 'tools/xentrace/formats')
-rw-r--r--tools/xentrace/formats66
1 files changed, 34 insertions, 32 deletions
diff --git a/tools/xentrace/formats b/tools/xentrace/formats
index 3460a5f99f..ca56b1c902 100644
--- a/tools/xentrace/formats
+++ b/tools/xentrace/formats
@@ -1,42 +1,44 @@
-0x0001f001 CPU%(cpu)d %(tsc)d lost_records 0x%(1)08x
+0x00000000 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) unknown (0x%(event)016x) [ 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x ]
-0x0002f001 CPU%(cpu)d %(tsc)d sched_add_domain [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f002 CPU%(cpu)d %(tsc)d sched_rem_domain [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f003 CPU%(cpu)d %(tsc)d domain_sleep [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f004 CPU%(cpu)d %(tsc)d domain_wake [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f005 CPU%(cpu)d %(tsc)d do_yield [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f006 CPU%(cpu)d %(tsc)d do_block [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f007 CPU%(cpu)d %(tsc)d domain_shutdown [ domid = 0x%(1)08x, edomid = 0x%(2)08x, reason = 0x%(3)08x ]
-0x0002f008 CPU%(cpu)d %(tsc)d sched_ctl
-0x0002f009 CPU%(cpu)d %(tsc)d sched_adjdom [ domid = 0x%(1)08x ]
-0x0002f00a CPU%(cpu)d %(tsc)d __enter_scheduler [ prev<domid:edomid> = 0x%(1)08x : 0x%(2)08x, next<domid:edomid> = 0x%(3)08x : 0x%(4)08x ]
-0x0002f00B CPU%(cpu)d %(tsc)d s_timer_fn
-0x0002f00c CPU%(cpu)d %(tsc)d t_timer_fn
-0x0002f00d CPU%(cpu)d %(tsc)d dom_timer_fn
+0x0001f001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) lost_records 0x%(1)08x
-0x00080001 CPU%(cpu)d %(tsc)d VMX_VMEXIT [ domid = 0x%(1)08x, eip = 0x%(2)08x, reason = 0x%(3)08x ]
-0x00084001 CPU%(cpu)d %(tsc)d VMX_INTR [ domid = 0x%(1)08x, trap = 0x%(2)08x, va = 0x%(3)08x ]
+0x0002f001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_add_domain [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
+0x0002f002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_rem_domain [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
+0x0002f003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_sleep [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
+0x0002f004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_wake [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
+0x0002f005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) do_yield [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
+0x0002f006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) do_block [ domid = 0x%(1)08x, edomid = 0x%(2)08x ]
+0x0002f007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_shutdown [ domid = 0x%(1)08x, edomid = 0x%(2)08x, reason = 0x%(3)08x ]
+0x0002f008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_ctl
+0x0002f009 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_adjdom [ domid = 0x%(1)08x ]
+0x0002f00a CPU%(cpu)d %(tsc)d (+%(reltsc)8d) __enter_scheduler [ prev<domid:edomid> = 0x%(1)08x : 0x%(2)08x, next<domid:edomid> = 0x%(3)08x : 0x%(4)08x ]
+0x0002f00B CPU%(cpu)d %(tsc)d (+%(reltsc)8d) s_timer_fn
+0x0002f00c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) t_timer_fn
+0x0002f00d CPU%(cpu)d %(tsc)d (+%(reltsc)8d) dom_timer_fn
-0x00081001 CPU%(cpu)d %(tsc)d VMEXIT_0 0x%(1)08x 0x%(2)08x 0x%(3)08x
-0x00082001 CPU%(cpu)d %(tsc)d VMENTRY_0 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00080001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMX_VMEXIT [ domid = 0x%(1)08x, eip = 0x%(2)08x, reason = 0x%(3)08x ]
+0x00084001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMX_INTR [ domid = 0x%(1)08x, trap = 0x%(2)08x, va = 0x%(3)08x ]
-0x00081002 CPU%(cpu)d %(tsc)d VMEXIT_1 0x%(1)08x 0x%(2)08x 0x%(3)08x
-0x00082002 CPU%(cpu)d %(tsc)d VMENTRY_1 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00081001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_0 0x%(1)08x 0x%(2)08x 0x%(3)08x
+0x00082001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_0 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-0x00081003 CPU%(cpu)d %(tsc)d VMEXIT_2 0x%(1)08x 0x%(2)08x 0x%(3)08x
-0x00082003 CPU%(cpu)d %(tsc)d VMENTRY_2 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00081002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_1 0x%(1)08x 0x%(2)08x 0x%(3)08x
+0x00082002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_1 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-0x00081004 CPU%(cpu)d %(tsc)d VMEXIT_3 0x%(1)08x 0x%(2)08x 0x%(3)08x
-0x00082004 CPU%(cpu)d %(tsc)d VMENTRY_3 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00081003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_2 0x%(1)08x 0x%(2)08x 0x%(3)08x
+0x00082003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_2 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-0x00081005 CPU%(cpu)d %(tsc)d VMEXIT_4 0x%(1)08x 0x%(2)08x 0x%(3)08x
-0x00082005 CPU%(cpu)d %(tsc)d VMENTRY_4 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00081004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_3 0x%(1)08x 0x%(2)08x 0x%(3)08x
+0x00082004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_3 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-0x00081006 CPU%(cpu)d %(tsc)d VMEXIT_5 0x%(1)08x 0x%(2)08x 0x%(3)08x
-0x00082006 CPU%(cpu)d %(tsc)d VMENTRY_5 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00081005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_4 0x%(1)08x 0x%(2)08x 0x%(3)08x
+0x00082005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_4 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-0x00081007 CPU%(cpu)d %(tsc)d VMEXIT_6 0x%(1)08x 0x%(2)08x 0x%(3)08x
-0x00082007 CPU%(cpu)d %(tsc)d VMENTRY_6 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00081006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_5 0x%(1)08x 0x%(2)08x 0x%(3)08x
+0x00082006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_5 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-0x00081008 CPU%(cpu)d %(tsc)d VMEXIT_7 0x%(1)08x 0x%(2)08x 0x%(3)08x
-0x00082008 CPU%(cpu)d %(tsc)d VMENTRY_7 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00081007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_6 0x%(1)08x 0x%(2)08x 0x%(3)08x
+0x00082007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_6 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+
+0x00081008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_7 0x%(1)08x 0x%(2)08x 0x%(3)08x
+0x00082008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_7 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x