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| author | Keir Fraser <keir@xen.org> | 2011-01-27 16:17:27 +0000 |
|---|---|---|
| committer | Keir Fraser <keir@xen.org> | 2011-01-27 16:17:27 +0000 |
| commit | 0145b0e442c094e02b698ea998e5c4ff9d346d6a (patch) | |
| tree | c826af9240f4387b3895c202069a0b1421f27ad3 /tools/libxl/libxl_cpuid.c | |
| parent | 688fe3de6797102afdc265051455f81c86dc211d (diff) | |
| download | xen-0145b0e442c094e02b698ea998e5c4ff9d346d6a.tar.gz xen-0145b0e442c094e02b698ea998e5c4ff9d346d6a.tar.bz2 xen-0145b0e442c094e02b698ea998e5c4ff9d346d6a.zip | |
hvm: allow pass-through of new FPU/ALU CPUID features
there are some new CPUID features that are safe for guests to see, as
they don't require OS awareness (FPU/ALU related instructions only).
Among features for new AMD CPUs there is also the PCLMULQDQ bit, which
Intel CPU have already for quite a while.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Diffstat (limited to 'tools/libxl/libxl_cpuid.c')
| -rw-r--r-- | tools/libxl/libxl_cpuid.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index 16348021a6..5c591f6f63 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -115,6 +115,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) {"dscpl", 0x00000001, NA, CPUID_REG_ECX, 4, 1}, {"monitor", 0x00000001, NA, CPUID_REG_ECX, 3, 1}, {"dtes64", 0x00000001, NA, CPUID_REG_ECX, 2, 1}, + {"pclmulqdq", 0x00000001, NA, CPUID_REG_ECX, 1, 1}, {"sse3", 0x00000001, NA, CPUID_REG_ECX, 0, 1}, {"pbe", 0x00000001, NA, CPUID_REG_EDX, 31, 1}, {"ia64", 0x00000001, NA, CPUID_REG_EDX, 30, 1}, |