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authorYang, Wei <wei.y.yang@intel.com>2011-06-14 13:13:18 +0100
committerYang, Wei <wei.y.yang@intel.com>2011-06-14 13:13:18 +0100
commitd3b35446fde62e77d97dc0c8edd9785b352f762c (patch)
tree523c60aedf4084c57db0ca2b3d5c377e66ed592e /tools/libxc/xc_cpuid_x86.c
parent4e9144664327f34764c5625734cc21d40201ebfb (diff)
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x86: Pass through ERMS CPUID feature for HVM and PV guests
This patch exposes ERMS feature to HVM and PV guests. The REP MOVSB/STOSB instruction can enhance fast strings attempts to move as much of the data with larger size load/stores as possible. Signed-off-by: Yang, Wei <wei.y.yang@intel.com>
Diffstat (limited to 'tools/libxc/xc_cpuid_x86.c')
-rw-r--r--tools/libxc/xc_cpuid_x86.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 287b1e7789..d791691e69 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -355,7 +355,8 @@ static void xc_cpuid_hvm_policy(
case 0x00000007: /* Intel-defined CPU features */
if ( input[1] == 0 ) {
- regs[1] &= bitmaskof(X86_FEATURE_SMEP);
+ regs[1] &= (bitmaskof(X86_FEATURE_SMEP) |
+ bitmaskof(X86_FEATURE_ERMS));
} else
regs[1] = 0;
regs[0] = regs[2] = regs[3] = 0;
@@ -478,7 +479,8 @@ static void xc_cpuid_pv_policy(
case 7:
if ( input[1] == 0 )
- regs[1] &= bitmaskof(X86_FEATURE_FSGSBASE);
+ regs[1] &= (bitmaskof(X86_FEATURE_FSGSBASE) |
+ bitmaskof(X86_FEATURE_ERMS));
else
regs[1] = 0;
regs[0] = regs[2] = regs[3] = 0;