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| author | Liu, Jinsong <jinsong.liu@intel.com> | 2012-09-26 12:14:30 +0200 |
|---|---|---|
| committer | Liu, Jinsong <jinsong.liu@intel.com> | 2012-09-26 12:14:30 +0200 |
| commit | 6fd5f43ad974e8759a9c7bb6c61987fc214f27cc (patch) | |
| tree | 83cd481a33d4b22c22dabf74f1a945fa7f521628 /tools/libxc/xc_cpuid_x86.c | |
| parent | e35cd2cce4fe119ef63913f3eb7443b7f5b57d75 (diff) | |
| download | xen-6fd5f43ad974e8759a9c7bb6c61987fc214f27cc.tar.gz xen-6fd5f43ad974e8759a9c7bb6c61987fc214f27cc.tar.bz2 xen-6fd5f43ad974e8759a9c7bb6c61987fc214f27cc.zip | |
x86: Expose TSC adjust to HVM guest
Intel latest SDM (17.13.3) release a new MSR CPUID.7.0.EBX[1]=1
indicates TSC_ADJUST MSR 0x3b is supported.
This patch expose it to hvm guest.
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Committed-by: Jan Beulich <jbeulich@suse.com>
Diffstat (limited to 'tools/libxc/xc_cpuid_x86.c')
| -rw-r--r-- | tools/libxc/xc_cpuid_x86.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 0882ce6554..17efc0f841 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -362,7 +362,8 @@ static void xc_cpuid_hvm_policy( case 0x00000007: /* Intel-defined CPU features */ if ( input[1] == 0 ) { - regs[1] &= (bitmaskof(X86_FEATURE_BMI1) | + regs[1] &= (bitmaskof(X86_FEATURE_TSC_ADJUST) | + bitmaskof(X86_FEATURE_BMI1) | bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_AVX2) | bitmaskof(X86_FEATURE_SMEP) | |