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author | Keir Fraser <keir@xen.org> | 2011-01-27 16:17:27 +0000 |
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committer | Keir Fraser <keir@xen.org> | 2011-01-27 16:17:27 +0000 |
commit | 0145b0e442c094e02b698ea998e5c4ff9d346d6a (patch) | |
tree | c826af9240f4387b3895c202069a0b1421f27ad3 /tools/libxc/xc_cpuid_x86.c | |
parent | 688fe3de6797102afdc265051455f81c86dc211d (diff) | |
download | xen-0145b0e442c094e02b698ea998e5c4ff9d346d6a.tar.gz xen-0145b0e442c094e02b698ea998e5c4ff9d346d6a.tar.bz2 xen-0145b0e442c094e02b698ea998e5c4ff9d346d6a.zip |
hvm: allow pass-through of new FPU/ALU CPUID features
there are some new CPUID features that are safe for guests to see, as
they don't require OS awareness (FPU/ALU related instructions only).
Among features for new AMD CPUs there is also the PCLMULQDQ bit, which
Intel CPU have already for quite a while.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Diffstat (limited to 'tools/libxc/xc_cpuid_x86.c')
-rw-r--r-- | tools/libxc/xc_cpuid_x86.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 407a53543f..150ca18066 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -101,7 +101,10 @@ static void amd_xc_cpuid_policy( bitmaskof(X86_FEATURE_ABM) | bitmaskof(X86_FEATURE_SSE4A) | bitmaskof(X86_FEATURE_MISALIGNSSE) | - bitmaskof(X86_FEATURE_3DNOWPREFETCH)); + bitmaskof(X86_FEATURE_3DNOWPREFETCH) | + bitmaskof(X86_FEATURE_XOP) | + bitmaskof(X86_FEATURE_FMA4) | + bitmaskof(X86_FEATURE_TBM)); regs[3] &= (0x0183f3ff | /* features shared with 0x00000001:EDX */ (is_pae ? bitmaskof(X86_FEATURE_NX) : 0) | (is_64bit ? bitmaskof(X86_FEATURE_LM) : 0) | @@ -251,12 +254,14 @@ static void xc_cpuid_hvm_policy( regs[1] = (regs[1] & 0x0000ffffu) | ((regs[1] & 0x007f0000u) << 1); regs[2] &= (bitmaskof(X86_FEATURE_XMM3) | + bitmaskof(X86_FEATURE_PCLMULQDQ) | bitmaskof(X86_FEATURE_SSSE3) | bitmaskof(X86_FEATURE_CX16) | bitmaskof(X86_FEATURE_SSE4_1) | bitmaskof(X86_FEATURE_SSE4_2) | bitmaskof(X86_FEATURE_POPCNT) | bitmaskof(X86_FEATURE_AES) | + bitmaskof(X86_FEATURE_F16C) | ((xfeature_mask != 0) ? (bitmaskof(X86_FEATURE_AVX) | bitmaskof(X86_FEATURE_XSAVE)) : 0)); |