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| author | Liu, Jinsong <jinsong.liu@intel.com> | 2012-03-01 16:31:52 +0000 |
|---|---|---|
| committer | Liu, Jinsong <jinsong.liu@intel.com> | 2012-03-01 16:31:52 +0000 |
| commit | db730e2b4fc3b650f05e99e556893e0d8cb771f1 (patch) | |
| tree | 316ebac80c054745596987067cbd61ec0f7ad228 /tools/libxc/xc_cpufeature.h | |
| parent | d9659850fbf929bed0b302323bf9465cd68492b9 (diff) | |
| download | xen-db730e2b4fc3b650f05e99e556893e0d8cb771f1.tar.gz xen-db730e2b4fc3b650f05e99e556893e0d8cb771f1.tar.bz2 xen-db730e2b4fc3b650f05e99e556893e0d8cb771f1.zip | |
x86,tools/libxc: expose HLE/RTM features to pv and hvm
Intel recently release 2 new features, HLE and TRM.
Refer to http://software.intel.com/file/41417.
This patch expose them to pv and hvm
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Committed-by: Keir Fraser <keir@xen.org>
Diffstat (limited to 'tools/libxc/xc_cpufeature.h')
| -rw-r--r-- | tools/libxc/xc_cpufeature.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tools/libxc/xc_cpufeature.h b/tools/libxc/xc_cpufeature.h index ff7c3d0042..e1772337ad 100644 --- a/tools/libxc/xc_cpufeature.h +++ b/tools/libxc/xc_cpufeature.h @@ -129,10 +129,12 @@ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx) */ #define X86_FEATURE_FSGSBASE 0 /* {RD,WR}{FS,GS}BASE instructions */ #define X86_FEATURE_BMI1 3 /* 1st group bit manipulation extensions */ +#define X86_FEATURE_HLE 4 /* Hardware Lock Elision */ #define X86_FEATURE_AVX2 5 /* AVX2 instructions */ #define X86_FEATURE_SMEP 7 /* Supervisor Mode Execution Protection */ #define X86_FEATURE_BMI2 8 /* 2nd group bit manipulation extensions */ #define X86_FEATURE_ERMS 9 /* Enhanced REP MOVSB/STOSB */ #define X86_FEATURE_INVPCID 10 /* Invalidate Process Context ID */ +#define X86_FEATURE_RTM 11 /* Restricted Transactional Memory */ #endif /* __LIBXC_CPUFEATURE_H */ |