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| author | Keir Fraser <keir@xen.org> | 2011-01-08 10:48:09 +0000 |
|---|---|---|
| committer | Keir Fraser <keir@xen.org> | 2011-01-08 10:48:09 +0000 |
| commit | c458f45d2eddcafed054651363ffb5c830e5df5b (patch) | |
| tree | 346f1c18c5f0dd3afaff2ba3fd0d7ee26e29b73c /tools/libxc/xc_cpufeature.h | |
| parent | f3af225db3f70df1c91cc70fea82ea67f6dffa8c (diff) | |
| download | xen-c458f45d2eddcafed054651363ffb5c830e5df5b.tar.gz xen-c458f45d2eddcafed054651363ffb5c830e5df5b.tar.bz2 xen-c458f45d2eddcafed054651363ffb5c830e5df5b.zip | |
libxc: Update AMD CPU feature flags 0x80000001:ECX for Xen tools
This patch syncs-up AMD CPU feature flags 0x80000001:ECX in libxc with
the latest Linux kernel.
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Diffstat (limited to 'tools/libxc/xc_cpufeature.h')
| -rw-r--r-- | tools/libxc/xc_cpufeature.h | 33 |
1 files changed, 19 insertions, 14 deletions
diff --git a/tools/libxc/xc_cpufeature.h b/tools/libxc/xc_cpufeature.h index 73c7f91ca9..07bdb95f1b 100644 --- a/tools/libxc/xc_cpufeature.h +++ b/tools/libxc/xc_cpufeature.h @@ -119,19 +119,24 @@ #define X86_FEATURE_PMM_EN (5*32+ 13) /* PMM enabled */ /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */ -#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ -#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ -#define X86_FEATURE_SVME (6*32+ 2) /* Secure Virtual Machine */ -#define X86_FEATURE_EXTAPICSPACE (6*32+ 3) /* Extended APIC space */ -#define X86_FEATURE_ALTMOVCR (6*32+ 4) /* LOCK MOV CR accesses CR+8 */ -#define X86_FEATURE_ABM (6*32+ 5) /* Advanced Bit Manipulation */ -#define X86_FEATURE_SSE4A (6*32+ 6) /* AMD Streaming SIMD Extensions-4a */ -#define X86_FEATURE_MISALIGNSSE (6*32+ 7) /* Misaligned SSE Access */ -#define X86_FEATURE_3DNOWPF (6*32+ 8) /* 3DNow! Prefetch */ -#define X86_FEATURE_OSVW (6*32+ 9) /* OS Visible Workaround */ -#define X86_FEATURE_IBS (6*32+ 10) /* Instruction Based Sampling */ -#define X86_FEATURE_SSE5 (6*32+ 11) /* AMD Streaming SIMD Extensions-5 */ -#define X86_FEATURE_SKINIT (6*32+ 12) /* SKINIT, STGI/CLGI, DEV */ -#define X86_FEATURE_WDT (6*32+ 13) /* Watchdog Timer */ +#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ +#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ +#define X86_FEATURE_SVM (6*32+ 2) /* Secure virtual machine */ +#define X86_FEATURE_EXTAPIC (6*32+ 3) /* Extended APIC space */ +#define X86_FEATURE_CR8_LEGACY (6*32+ 4) /* CR8 in 32-bit mode */ +#define X86_FEATURE_ABM (6*32+ 5) /* Advanced bit manipulation */ +#define X86_FEATURE_SSE4A (6*32+ 6) /* SSE-4A */ +#define X86_FEATURE_MISALIGNSSE (6*32+ 7) /* Misaligned SSE mode */ +#define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */ +#define X86_FEATURE_OSVW (6*32+ 9) /* OS Visible Workaround */ +#define X86_FEATURE_IBS (6*32+10) /* Instruction Based Sampling */ +#define X86_FEATURE_XOP (6*32+11) /* extended AVX instructions */ +#define X86_FEATURE_SKINIT (6*32+12) /* SKINIT/STGI instructions */ +#define X86_FEATURE_WDT (6*32+13) /* Watchdog timer */ +#define X86_FEATURE_LWP (6*32+15) /* Light Weight Profiling */ +#define X86_FEATURE_FMA4 (6*32+16) /* 4 operands MAC instructions */ +#define X86_FEATURE_NODEID_MSR (6*32+19) /* NodeId MSR */ +#define X86_FEATURE_TBM (6*32+21) /* trailing bit manipulations */ +#define X86_FEATURE_TOPOEXT (6*32+22) /* topology extensions CPUID leafs */ #endif /* __LIBXC_CPUFEATURE_H */ |