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| author | Tim Deegan <Tim.Deegan@citrix.com> | 2011-06-06 13:46:48 +0100 |
|---|---|---|
| committer | Tim Deegan <Tim.Deegan@citrix.com> | 2011-06-06 13:46:48 +0100 |
| commit | 89c9f78710434be622c7616f58b46e4e55145b46 (patch) | |
| tree | 9fba0b8fe43dd22c9f4241bed7c84a6b1526dfbf /tools/libxc/xc_cpufeature.h | |
| parent | 95fad62ad62d48a2dec069c06aa026b5c8e71a5b (diff) | |
| download | xen-89c9f78710434be622c7616f58b46e4e55145b46.tar.gz xen-89c9f78710434be622c7616f58b46e4e55145b46.tar.bz2 xen-89c9f78710434be622c7616f58b46e4e55145b46.zip | |
x86/hvm: add SMEP support to HVM guest
Intel new CPU supports SMEP (Supervisor Mode Execution Protection). SMEP
prevents software operating with CPL < 3 (supervisor mode) from fetching
instructions from any linear address with a valid translation for which the U/S
flag (bit 2) is 1 in every paging-structure entry controlling the translation
for the linear address.
This patch adds SMEP support to HVM guest.
Signed-off-by: Yang Wei <wei.y.yang@intel.com>
Signed-off-by: Shan Haitao <haitao.shan@intel.com>
Signed-off-by: Li Xin <xin.li@intel.com>
Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
Diffstat (limited to 'tools/libxc/xc_cpufeature.h')
| -rw-r--r-- | tools/libxc/xc_cpufeature.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/libxc/xc_cpufeature.h b/tools/libxc/xc_cpufeature.h index a0dbbd2052..a110e6ef01 100644 --- a/tools/libxc/xc_cpufeature.h +++ b/tools/libxc/xc_cpufeature.h @@ -124,5 +124,6 @@ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx) */ #define X86_FEATURE_FSGSBASE 0 /* {RD,WR}{FS,GS}BASE instructions */ +#define X86_FEATURE_SMEP 7 /* Supervisor Mode Execution Protection */ #endif /* __LIBXC_CPUFEATURE_H */ |