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| author | Ian Campbell <ian.campbell@citrix.com> | 2012-12-19 14:16:29 +0000 |
|---|---|---|
| committer | Ian Campbell <ian.campbell@citrix.com> | 2012-12-19 14:16:29 +0000 |
| commit | 977dba41ab7c2380c4b6757aed2e680a0d7df4c1 (patch) | |
| tree | d8410ccfb4905b276b7f4acffb8bfc17f6712e54 | |
| parent | 744579f0a5eb8574b6b0728c08e69576161af2e1 (diff) | |
| download | xen-977dba41ab7c2380c4b6757aed2e680a0d7df4c1.tar.gz xen-977dba41ab7c2380c4b6757aed2e680a0d7df4c1.tar.bz2 xen-977dba41ab7c2380c4b6757aed2e680a0d7df4c1.zip | |
xen: arm: reorder registers in struct cpu_user_regs.
Primarily this is so that they are ordered in the same way as the
mapping from arm64 x0..x31 registers to the arm32 registers, which is
just less confusing for everyone going forward.
It also makes the implementation of select_user_regs in the next patch
slightly simpler.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Committed-by: Ian Campbell <ian.campbell@citrix.com>
| -rw-r--r-- | xen/arch/arm/entry.S | 4 | ||||
| -rw-r--r-- | xen/arch/arm/io.h | 1 | ||||
| -rw-r--r-- | xen/arch/arm/traps.c | 2 | ||||
| -rw-r--r-- | xen/include/public/arch-arm.h | 11 |
4 files changed, 11 insertions, 7 deletions
diff --git a/xen/arch/arm/entry.S b/xen/arch/arm/entry.S index cbd1c48f92..36114273d7 100644 --- a/xen/arch/arm/entry.S +++ b/xen/arch/arm/entry.S @@ -12,7 +12,7 @@ RESTORE_ONE_BANKED(SP_##mode) ; RESTORE_ONE_BANKED(LR_##mode) ; RESTORE_ONE_BANKED(SPSR_##mode) #define SAVE_ALL \ - sub sp, #(UREGS_R8_fiq - UREGS_sp); /* SP, LR, SPSR, PC */ \ + sub sp, #(UREGS_SP_usr - UREGS_sp); /* SP, LR, SPSR, PC */ \ push {r0-r12}; /* Save R0-R12 */ \ \ mrs r11, ELR_hyp; /* ELR_hyp is return address. */\ @@ -115,7 +115,7 @@ ENTRY(return_to_hypervisor) ldr r11, [sp, #UREGS_cpsr] msr SPSR_hyp, r11 pop {r0-r12} - add sp, #(UREGS_R8_fiq - UREGS_sp); /* SP, LR, SPSR, PC */ + add sp, #(UREGS_SP_usr - UREGS_sp); /* SP, LR, SPSR, PC */ eret /* diff --git a/xen/arch/arm/io.h b/xen/arch/arm/io.h index 9a507f5225..0933aa8529 100644 --- a/xen/arch/arm/io.h +++ b/xen/arch/arm/io.h @@ -21,6 +21,7 @@ #include <xen/lib.h> #include <asm/processor.h> +#include <asm/regs.h> typedef struct { diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 19e20814c9..096dc0bfb3 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -43,7 +43,7 @@ * stack) must be doubleword-aligned in size. */ static inline void check_stack_alignment_constraints(void) { BUILD_BUG_ON((sizeof (struct cpu_user_regs)) & 0x7); - BUILD_BUG_ON((offsetof(struct cpu_user_regs, r8_fiq)) & 0x7); + BUILD_BUG_ON((offsetof(struct cpu_user_regs, sp_usr)) & 0x7); BUILD_BUG_ON((sizeof (struct cpu_info)) & 0x7); } diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index ff02d15502..d8788f2151 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -119,12 +119,15 @@ struct cpu_user_regs /* Outer guest frame only from here on... */ - uint32_t r8_fiq, r9_fiq, r10_fiq, r11_fiq, r12_fiq; - uint32_t sp_usr; /* LR_usr is the same register as LR, see above */ - uint32_t sp_svc, sp_abt, sp_und, sp_irq, sp_fiq; - uint32_t lr_svc, lr_abt, lr_und, lr_irq, lr_fiq; + uint32_t sp_irq, lr_irq; + uint32_t sp_svc, lr_svc; + uint32_t sp_abt, lr_abt; + uint32_t sp_und, lr_und; + + uint32_t r8_fiq, r9_fiq, r10_fiq, r11_fiq, r12_fiq; + uint32_t sp_fiq, lr_fiq; uint32_t spsr_svc, spsr_abt, spsr_und, spsr_irq, spsr_fiq; |