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| author | Keir Fraser <keir.fraser@citrix.com> | 2008-05-06 10:25:34 +0100 |
|---|---|---|
| committer | Keir Fraser <keir.fraser@citrix.com> | 2008-05-06 10:25:34 +0100 |
| commit | 8be7a2fd46155d29f7202c4a7b85b078f8cf96c1 (patch) | |
| tree | eaa0b53aa0548060b5089d04dc74e7ecb347f548 | |
| parent | 551ceee97513fff7ff5cb5899622612e609ccec8 (diff) | |
| download | xen-8be7a2fd46155d29f7202c4a7b85b078f8cf96c1.tar.gz xen-8be7a2fd46155d29f7202c4a7b85b078f8cf96c1.tar.bz2 xen-8be7a2fd46155d29f7202c4a7b85b078f8cf96c1.zip | |
x86, Intel: Make only EST feature visible to dom0 to enable Cx-state
logic. There should be no need to make MWAIT visible.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
| -rw-r--r-- | xen/arch/x86/traps.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index ebdf25db4f..54776ccc8c 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -713,8 +713,7 @@ static int emulate_forced_invalid_op(struct cpu_user_regs *regs) __clear_bit(X86_FEATURE_PBE, &d); __clear_bit(X86_FEATURE_DTES64 % 32, &c); - if ( !IS_PRIV(current->domain) ) - __clear_bit(X86_FEATURE_MWAIT % 32, &c); + __clear_bit(X86_FEATURE_MWAIT % 32, &c); __clear_bit(X86_FEATURE_DSCPL % 32, &c); __clear_bit(X86_FEATURE_VMXE % 32, &c); __clear_bit(X86_FEATURE_SMXE % 32, &c); @@ -2148,9 +2147,8 @@ static int emulate_privileged_op(struct cpu_user_regs *regs) case MSR_IA32_MISC_ENABLE: if ( rdmsr_safe(regs->ecx, regs->eax, regs->edx) ) goto fail; - regs->eax &= ~MSR_IA32_MISC_ENABLE_PERF_AVAIL; - if ( !IS_PRIV(current->domain) ) - regs->eax &= ~MSR_IA32_MISC_ENABLE_MONITOR_ENABLE; + regs->eax &= ~(MSR_IA32_MISC_ENABLE_PERF_AVAIL | + MSR_IA32_MISC_ENABLE_MONITOR_ENABLE); regs->eax |= MSR_IA32_MISC_ENABLE_BTS_UNAVAIL | MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL | MSR_IA32_MISC_ENABLE_XTPR_DISABLE; |