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| author | Ian Campbell <ian.campbell@citrix.com> | 2013-02-22 08:58:00 +0000 |
|---|---|---|
| committer | Ian Campbell <ian.campbell@citrix.com> | 2013-02-22 12:14:53 +0000 |
| commit | 482b00b90ef725eeb49a949e2c331525cd94209f (patch) | |
| tree | 655984c46bfabd68621c87fc3a1d6445a1b00750 | |
| parent | 08551b90080e0e9a60a6e7f2a7855aa970f0643f (diff) | |
| download | xen-482b00b90ef725eeb49a949e2c331525cd94209f.tar.gz xen-482b00b90ef725eeb49a949e2c331525cd94209f.tar.bz2 xen-482b00b90ef725eeb49a949e2c331525cd94209f.zip | |
xen: arm: extend HSR struct definitions to 64-bit
The main change is that the 4-bit register specifiers are extended
to 5 bits by taking in an adjacent SBZP bit.
Also 64-bit has two other properties indicting whether or not the
target register was 64-bit (x<n>) or 32-bit (w<n>) and whether the
instruction has acquire/release semantics.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
| -rw-r--r-- | xen/include/asm-arm/processor.h | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 86e6f26aa9..a9ce0419bf 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -99,11 +99,11 @@ union hsr { unsigned long ec:6; /* Exception Class */ }; + /* reg, reg0, reg1 are 4 bits on AArch32, the fifth bit is sbzp. */ struct hsr_cp32 { unsigned long read:1; /* Direction */ unsigned long crm:4; /* CRm */ - unsigned long reg:4; /* Rt */ - unsigned long sbzp:1; + unsigned long reg:5; /* Rt */ unsigned long crn:4; /* CRn */ unsigned long op1:3; /* Op1 */ unsigned long op2:3; /* Op2 */ @@ -116,10 +116,9 @@ union hsr { struct hsr_cp64 { unsigned long read:1; /* Direction */ unsigned long crm:4; /* CRm */ - unsigned long reg1:4; /* Rt1 */ - unsigned long sbzp1:1; - unsigned long reg2:4; /* Rt2 */ - unsigned long sbzp2:2; + unsigned long reg1:5; /* Rt1 */ + unsigned long reg2:5; /* Rt2 */ + unsigned long sbzp2:1; unsigned long op1:4; /* Op1 */ unsigned long cc:4; /* Condition Code */ unsigned long ccvalid:1;/* CC Valid */ @@ -133,9 +132,14 @@ union hsr { unsigned long s1ptw:1; /* */ unsigned long cache:1; /* Cache Maintenance */ unsigned long eat:1; /* External Abort Type */ +#ifdef CONFIG_ARM_32 unsigned long sbzp0:6; - unsigned long reg:4; /* Register */ - unsigned long sbzp1:1; +#else + unsigned long sbzp0:4; + unsigned long ar:1; /* Acquire Release */ + unsigned long sf:1; /* Sixty Four bit register */ +#endif + unsigned long reg:5; /* Register */ unsigned long sign:1; /* Sign extend */ unsigned long size:2; /* Access Size */ unsigned long valid:1; /* Syndrome Valid */ |