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authorJan Beulich <jbeulich@suse.com>2013-08-27 11:15:15 +0200
committerJan Beulich <jbeulich@suse.com>2013-08-27 11:15:15 +0200
commit3e787021fb2420851c7bdc3911ea53c728ba5ac0 (patch)
treef837b5358dfe8867a796ec088e5b9ad7f9fe5d6e
parent784ce3fd05476ffe46bf54579f3927c777eb2c3b (diff)
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x86/Intel: add support for Haswell CPU models
... according to their most recent public documentation. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
-rw-r--r--xen/arch/x86/acpi/cpu_idle.c4
-rw-r--r--xen/arch/x86/hvm/vmx/vmx.c2
-rw-r--r--xen/arch/x86/hvm/vmx/vpmu_core2.c7
3 files changed, 10 insertions, 3 deletions
diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
index dfc38f3701..870fab832a 100644
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -135,8 +135,10 @@ static void do_get_hw_residencies(void *arg)
case 0x3A:
case 0x3E:
/* Haswell */
- case 0x3c:
+ case 0x3C:
+ case 0x3F:
case 0x45:
+ case 0x46:
GET_PC2_RES(hw_res->pc2);
GET_CC7_RES(hw_res->cc7);
/* fall through */
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 011a8179d9..782f8de524 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -1815,7 +1815,7 @@ static const struct lbr_info *last_branch_msr_get(void)
/* Ivy Bridge */
case 58: case 62:
/* Haswell */
- case 60: case 69:
+ case 60: case 63: case 69: case 70:
return nh_lbr;
break;
/* Atom */
diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c
index 41a326bc11..8c556c7768 100644
--- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
+++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
@@ -909,7 +909,12 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags)
case 0x3a: /* IvyBridge */
case 0x3e: /* IvyBridge EP */
- case 0x3c: /* Haswell */
+
+ /* Haswell: */
+ case 0x3c:
+ case 0x3f:
+ case 0x45:
+ case 0x46:
ret = core2_vpmu_initialise(v, vpmu_flags);
if ( !ret )
vpmu->arch_vpmu_ops = &core2_vpmu_ops;