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authorroot <root@lamia.panaceas.james.local>2017-06-14 09:10:58 +0100
committerroot <root@lamia.panaceas.james.local>2017-06-14 09:10:58 +0100
commit809b234c2b9cd5fb3fe3bc6f7611cc30b9fe40c8 (patch)
treec0e11493dd15d73bf6daf5c3892d7d746fbcd9f1
downloadserial_debugging-master.zip
serial_debugging-master.tar.gz
serial_debugging-master.tar.bz2
initial commitHEADmaster
-rw-r--r--Makefile1
-rw-r--r--serial_over_dp.c815
-rw-r--r--serial_over_speaker.c572
-rw-r--r--stm32f1/serial_over_dp.hex1043
-rw-r--r--stm32f1/usbdfu.hex393
5 files changed, 2824 insertions, 0 deletions
diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..ecdf4a0
--- /dev/null
+++ b/Makefile
@@ -0,0 +1 @@
+all: serial_over_speaker serial_over_dp
diff --git a/serial_over_dp.c b/serial_over_dp.c
new file mode 100644
index 0000000..20d55d9
--- /dev/null
+++ b/serial_over_dp.c
@@ -0,0 +1,815 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <sys/io.h>
+
+/*
+ * Linux won't let us access the MMIO bars from userland, becasue of a
+ * conflict in the PAT mappings. However Intel added a way of writing
+ * to the MMIO region using only IO port writes for their 16 bit video
+ * BIOS. So we use that.
+ *
+ * If you're in a kernel, you can write directly, and define this
+ *
+ */
+
+#undef USE_MMIO
+
+/* PCI registers */
+
+#define PCI_VENDOR_ID 0x00
+#define PCI_DEVICE_ID 0x02
+#define PCI_CLASS_DEVICE 0x0a
+
+#define PCI_BASE_ADDRESS(i) (0x10 + (i<< 2))
+#define PCI_BASE_ADDRESS_0 PCI_BASE_ADDRESS(0)
+
+#define PCI_NR_BASE_ADDRESS 6
+
+#define PCI_BASE_ADDRESS_SPACE_IO (0x01UL)
+#define PCI_BASE_ADDRESS_IO_MASK (~0x07UL)
+#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)
+#define PCI_BASE_ADDRESS_TYPE_MASK (0x06UL)
+#define PCI_BASE_ADDRESS_TYPE_64BIT (0x04UL)
+#define PCI_BASE_ADDRESS_PREFETCHABLE (0x08UL)
+
+/* Intel GPU registers */
+#define IGFX_PCH_OFFSET 0xc0000
+
+#define IGFX_GPIOA 0x05010
+#define IGFX_GPIO(port) ((IGFX_GPIOA) + ((port) << 2))
+#define IGFX_NUM_PORTS 6
+
+#define IGFX_GMBUS0 0x05100
+#define IGFX_GMBUS4 0x05110
+
+/*
+ * These look like independent bits, but on the other
+ * side it's implemented by a uC. The uC programmers
+ * have implemented it as an RPC-a-like interface so
+ * so it gets confused if you change more than one
+ * set of pins at a time.
+ */
+
+#define GPIO_CLOCK_DIR_MASK (1 << 0)
+#define GPIO_CLOCK_DIR_IN (0 << 1)
+#define GPIO_CLOCK_DIR_OUT (1 << 1)
+#define GPIO_CLOCK_VAL_MASK (1 << 2)
+#define GPIO_CLOCK_VAL_OUT (1 << 3)
+#define GPIO_CLOCK_VAL_IN (1 << 4)
+#define GPIO_CLOCK_PULLUP_DISABLE (1 << 5)
+#define GPIO_DATA_DIR_MASK (1 << 8)
+#define GPIO_DATA_DIR_IN (0 << 9)
+#define GPIO_DATA_DIR_OUT (1 << 9)
+#define GPIO_DATA_VAL_MASK (1 << 10)
+#define GPIO_DATA_VAL_OUT (1 << 11)
+#define GPIO_DATA_VAL_IN (1 << 12)
+#define GPIO_DATA_PULLUP_DISABLE (1 << 13)
+
+/* I2C addresses (left shifted by one) */
+
+#define I2C_EEPROM_ADDRESS 0xA0
+#define I2C_SC16IS7XX_ADDRESS 0x90
+
+#define I2C_READ 1
+#define I2C_WRITE 0
+
+/* 16550 registers */
+
+#define BAUD_BASE 1843200
+
+#define RXR ((0))
+#define TXR ((0))
+#define DLLR ((0))
+
+#define IER ((1))
+#define DLHR ((1))
+
+#define IIR ((2))
+#define FCR ((2))
+
+#define LCR ((3))
+#define LCR_WS0 (1<<0)
+#define LCR_WS1 (1<<1)
+#define LCR_NSTOP (1<<2)
+#define LCR_PARITY_ENABLE (1<<3)
+#define LCR_EVEN_PARITY (1<<4)
+#define LCR_STUCK_PARITY (1<<5)
+#define LCR_BREAK (1<<6)
+#define LCR_DLAB (1<<7)
+
+#define MCR ((4))
+#define MCR_DTR (1<<0)
+#define MCR_RTS (1<<1)
+#define MCR_AUX1 (1<<2)
+#define MCR_AUX2 (1<<3)
+#define MCR_LOOP (1<<4)
+#define MCR_AUTOFLOW (1<<5)
+
+#define LSR ((5))
+#define LSR_DA (1<<0)
+#define LSR_OR (1<<1)
+#define LSR_PE (1<<2)
+#define LSR_FE (1<<3)
+#define LSR_BRK (1<<4)
+#define LSR_THRE (1<<5)
+#define LSR_THREI (1<<6)
+#define LSR_FIFOE (1<<7)
+
+#define MSR ((6))
+
+#define TXR_NOINC ((TXR) | (1UL << 4))
+
+#define BAUD_RATE 115200
+
+
+/* intrinsics */
+
+static inline void
+out_8 (uint16_t port, uint8_t value)
+{
+ asm volatile ("outb %b0,%w1"::"a" (value), "Nd" (port));
+}
+
+
+static inline uint8_t
+in_8 (uint16_t port)
+{
+ uint8_t ret;
+ asm volatile ("inb %w1,%b0":"=a" (ret):"Nd" (port));
+ return ret;
+}
+
+
+static inline uint16_t
+in_16 (uint16_t port)
+{
+ uint16_t ret;
+ asm volatile ("inw %w1,%w0":"=a" (ret):"Nd" (port));
+ return ret;
+}
+
+static inline void
+out_16 (uint16_t port, uint16_t value)
+{
+ asm volatile ("outw %w0,%w1"::"a" (value), "Nd" (port));
+}
+
+static inline void
+out_32 (uint16_t port, uint32_t value)
+{
+ asm volatile ("outl %d0,%w1"::"a" (value), "Nd" (port));
+}
+
+static inline uint32_t
+in_32 (uint16_t port)
+{
+ uint32_t ret;
+ asm volatile ("inl %w1,%d0":"=a" (ret):"Nd" (port));
+ return ret;
+}
+
+static inline void
+io_delay (void)
+{
+ out_8 (0x80, 0x0);
+}
+
+static inline void
+write_32 (volatile void *addr, uint32_t val)
+{
+ asm volatile ("mov" "l" " %0,%1"::"r" (val),
+ "m" (*(volatile uint32_t *) addr):"memory");
+}
+
+static inline uint32_t
+read_32 (const volatile void *addr)
+{
+ uint32_t ret;
+ asm volatile ("mov" "l"
+ " %1,%0":"=r" (ret):"m" (*(volatile uint32_t *)
+ addr):"memory");
+ return ret;
+}
+
+
+/* PCI */
+
+static uint16_t
+pci_conf1_read_16 (int bus, int slot, int fn, int off)
+{
+ int addr = 0xcfc + (off & 3);
+ out_32 (0x0cf8,
+ 0x80000000 | (bus << 16) | (slot << 11) | (fn << 8) | (off & ~3));
+ return in_16 (addr);
+}
+
+static uint32_t
+pci_conf1_read_32 (int bus, int slot, int fn, int off)
+{
+ int addr = 0xcfc + (off & 3);
+ out_32 (0x0cf8,
+ 0x80000000 | (bus << 16) | (slot << 11) | (fn << 8) | (off & ~3));
+ return in_32 (addr);
+}
+
+
+/* IGFX */
+
+static uint64_t igfx_mmio_base;
+
+static int
+igfx_set_mmio_base (void)
+{
+ uint16_t vid, class;
+ unsigned b = 0, d = 2, f = 0;
+ uint64_t bar;
+ unsigned i;
+
+ igfx_mmio_base = 0;
+
+ vid = pci_conf1_read_32 (b, d, f, PCI_VENDOR_ID);
+
+ if (vid != 0x8086)
+ return 0;
+
+ class = pci_conf1_read_16 (b, d, f, PCI_CLASS_DEVICE);
+
+ if (class != 0x300)
+ return -1;
+
+ for (i = 0; i < PCI_NR_BASE_ADDRESS; i++)
+ {
+ bar = pci_conf1_read_32 (b, d, f, PCI_BASE_ADDRESS (i));
+
+ if (!bar)
+ continue;
+
+#ifdef USE_MMIO
+
+ if (!bar)
+ continue;
+
+ if (bar & PCI_BASE_ADDRESS_SPACE_IO)
+ continue;
+
+ if ((bar & PCI_BASE_ADDRESS_TYPE_MASK) == PCI_BASE_ADDRESS_TYPE_64BIT)
+ {
+ i++;
+ bar |=
+ ((uint64_t) pci_conf1_read_32 (b, d, f, PCI_BASE_ADDRESS (i))) <<
+ 32;
+ }
+
+ if (bar & PCI_BASE_ADDRESS_PREFETCHABLE)
+ continue;
+
+ igfx_mmio_base = bar & ~0xfULL;
+#else
+ if (!(bar & PCI_BASE_ADDRESS_SPACE_IO))
+ continue;
+
+ igfx_mmio_base = bar & ~0xfULL;
+#endif
+
+ return 0;
+ }
+
+ return -1;
+}
+
+
+static void
+igfx_write_32 (uint32_t reg, uint32_t val)
+{
+#ifdef USE_MMIO
+ uint32_t *p = (uint32_t *) (igfx_mmio_base + reg);
+#endif
+
+ if (!igfx_mmio_base)
+ return;
+
+#ifdef USE_MMIO
+ write_32 (p, val);
+#else
+ out_32 (igfx_mmio_base, reg);
+ out_32 (igfx_mmio_base + 4, val);
+#endif
+}
+
+
+static uint32_t
+igfx_read_32 (uint32_t reg)
+{
+#ifdef USE_MMIO
+ uint32_t *p = (uint32_t *) (igfx_mmio_base + reg);
+#endif
+
+ if (!igfx_mmio_base)
+ return ~0;
+
+#ifdef USE_MMIO
+ return read_32 (p);
+#else
+ out_32 (igfx_mmio_base, reg);
+ return in_32 (igfx_mmio_base + 4);
+#endif
+}
+
+/* IGFX GPIO */
+
+static uint64_t igfx_gpio_ctl;
+
+static int
+igfx_set_gpio_ctl (unsigned port)
+{
+ igfx_gpio_ctl = 0;
+
+ if (igfx_set_mmio_base ())
+ return -1;
+
+ igfx_gpio_ctl = IGFX_PCH_OFFSET + IGFX_GPIO (port);
+
+ return 0;
+}
+
+static inline void
+igfx_write_gpio_ctl (uint32_t v)
+{
+ igfx_write_32 (igfx_gpio_ctl, v);
+ igfx_read_32 (igfx_gpio_ctl);
+}
+
+
+static inline uint32_t
+igfx_read_gpio_ctl (void)
+{
+ igfx_read_32 (igfx_gpio_ctl);
+ return igfx_read_32 (igfx_gpio_ctl);
+}
+
+/* I2C bits */
+
+static void
+i2c_set_scl (int clk)
+{
+ igfx_write_gpio_ctl (clk ? (GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK)
+ : (GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
+ GPIO_CLOCK_VAL_MASK));
+}
+
+
+static void
+i2c_set_sda (int dat)
+{
+ igfx_write_gpio_ctl (dat ? (GPIO_DATA_DIR_IN | GPIO_DATA_DIR_MASK)
+ : (GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
+ GPIO_DATA_VAL_MASK));
+}
+
+static int
+i2c_get_scl (void)
+{
+ return ! !(igfx_read_gpio_ctl () & GPIO_CLOCK_VAL_IN);
+}
+
+
+static int
+i2c_get_sda (void)
+{
+ return ! !(igfx_read_gpio_ctl () & GPIO_DATA_VAL_IN);
+}
+
+static void
+i2c_bit_wait (void)
+{
+ io_delay ();
+}
+
+static void
+i2c_wait_scl (void)
+{
+ static int no_wait_scl = 0;
+ unsigned n = 1000;
+
+ if (i2c_get_scl ())
+ {
+ no_wait_scl = 0;
+ return;
+ }
+
+ if (no_wait_scl == 1)
+ return;
+
+ while (!i2c_get_scl ())
+ {
+ if (!(n--))
+ {
+ no_wait_scl = 1;
+ return;
+ }
+
+ i2c_bit_wait ();
+ }
+}
+
+
+/* I2C protocol */
+
+static void
+i2c_start (void)
+{
+ i2c_set_scl (1);
+ i2c_set_sda (1);
+ i2c_bit_wait ();
+
+ i2c_set_sda (0);
+ i2c_bit_wait ();
+
+ i2c_set_scl (0);
+ i2c_bit_wait ();
+}
+
+static void
+i2c_write_bit (int b)
+{
+ i2c_set_scl (0);
+ i2c_set_sda (b);
+ i2c_bit_wait ();
+
+
+ i2c_set_scl (1);
+ i2c_bit_wait ();
+ i2c_wait_scl ();
+
+ i2c_set_scl (0);
+ i2c_bit_wait ();
+}
+
+/* Send a stop signal to the I2C bus */
+static void
+i2c_stop ()
+{
+
+ i2c_set_sda (0);
+ i2c_set_scl (0);
+ i2c_bit_wait ();
+
+ i2c_set_scl (1);
+ i2c_bit_wait ();
+
+ i2c_set_sda (1);
+ i2c_bit_wait ();
+}
+
+/* Write the specified number of bits to the I2C bus (msb first) */
+static void
+i2c_write_bits (uint32_t d, unsigned n)
+{
+ uint32_t c;
+
+ for (c = 1 << (n - 1); c; c >>= 1)
+ i2c_write_bit (d & c);
+}
+
+static int
+i2c_read_bit (void)
+{
+ int ret;
+
+ i2c_set_sda (1);
+ i2c_set_scl (0);
+ i2c_bit_wait ();
+
+ i2c_set_scl (1);
+ i2c_bit_wait ();
+ i2c_wait_scl ();
+
+ ret = i2c_get_sda ();
+
+ i2c_set_scl (0);
+ i2c_bit_wait ();
+
+ return ret;
+}
+
+
+static uint32_t
+i2c_read_bits (unsigned n)
+{
+ uint32_t ret = 0;
+
+ while (n--)
+ {
+ ret <<= 1;
+ ret |= i2c_read_bit ()? 1 : 0;
+ }
+
+ return ret;
+}
+
+static int
+i2c_read_bytes (uint8_t * buf, size_t n)
+{
+ while (n--)
+ {
+ *(buf++) = i2c_read_bits (8);
+ i2c_write_bit (!n); /*Don't ACK last byte */
+ }
+
+ return 0;
+}
+
+static int
+i2c_write_bytes (uint8_t * buf, size_t n)
+{
+ while (n--)
+ {
+ i2c_write_bits (*(buf++), 8);
+
+ if (i2c_read_bit ()) /*check ACK */
+ return -1;
+ }
+
+ return 0;
+}
+
+
+static int
+i2c_read (uint8_t i2c_addr, uint8_t dev_addr, uint8_t * buf, size_t n)
+{
+ int ret = -1;
+
+ i2c_start ();
+ i2c_write_bits (i2c_addr | I2C_WRITE, 8);
+
+ do
+ {
+ if (i2c_read_bit ()) /*check ACK */
+ break;
+
+ i2c_write_bits (dev_addr, 8);
+
+ if (i2c_read_bit ()) /*check ACK */
+ break;
+
+ if (n)
+ {
+ i2c_start ();
+ i2c_write_bits (i2c_addr | I2C_READ, 8);
+
+ if (i2c_read_bit ()) /*check ACK */
+ break;
+
+ if (i2c_read_bytes (buf, n))
+ break;
+ }
+
+
+ ret = 0;
+
+
+ }
+ while (0);
+
+
+ i2c_stop ();
+
+ return ret;
+}
+
+static int
+i2c_write (uint8_t i2c_addr, uint8_t dev_addr, uint8_t * buf, size_t n)
+{
+ int ret = -1;
+
+ i2c_start ();
+ i2c_write_bits (i2c_addr | I2C_WRITE, 8);
+
+ do
+ {
+ if (i2c_read_bit ()) /*check ACK */
+ break;
+
+ i2c_write_bits (dev_addr, 8);
+
+ if (i2c_read_bit ()) /*check ACK */
+ break;
+
+ if (n && i2c_write_bytes (buf, n))
+ break;
+
+ ret = 0;
+
+ }
+ while (0);
+
+
+ i2c_stop ();
+
+ return ret;
+}
+
+static int
+i2c_test_state (int s_sda, int s_scl)
+{
+ int g_sda, g_scl;
+
+ s_sda = ! !s_sda;
+ s_scl = ! !s_scl;
+
+ i2c_set_scl (s_scl);
+ i2c_set_sda (s_sda);
+ i2c_bit_wait ();
+ g_scl = i2c_get_scl ();
+ g_sda = i2c_get_sda ();
+
+ if ((g_scl != s_scl) || (g_sda != s_sda))
+ return 1;
+
+ return 0;
+}
+
+
+static int
+i2c_test_adapter (void)
+{
+ int ret = 0;
+ ret |= i2c_test_state (1, 1);
+ ret |= i2c_test_state (0, 1);
+ ret |= i2c_test_state (0, 0);
+ ret |= i2c_test_state (0, 1);
+ ret |= i2c_test_state (1, 1);
+ return ret;
+}
+
+static int
+i2c_init_adapter (unsigned port)
+{
+
+ if (igfx_set_gpio_ctl (port))
+ return -1;
+
+ if (i2c_test_adapter ())
+ return -1;
+
+ return 0;
+}
+
+/* serial port */
+
+
+static uint8_t
+serial_read_reg (unsigned reg)
+{
+ uint8_t val = 0;
+ i2c_read (I2C_SC16IS7XX_ADDRESS, reg, &val, 1);
+ return val;
+}
+
+
+static void
+serial_write_reg (unsigned reg, uint8_t val)
+{
+ i2c_write (I2C_SC16IS7XX_ADDRESS, reg, &val, 1);
+}
+
+static void
+serial_write_reg_buf (unsigned reg, uint8_t * buf, size_t len)
+{
+ i2c_write (I2C_SC16IS7XX_ADDRESS, reg, buf, len);
+}
+
+
+static int
+serial_probe (void)
+{
+ uint8_t ier, lcr, dlh;
+
+ lcr = serial_read_reg (LCR);
+ serial_write_reg (LCR, lcr | LCR_DLAB);
+ dlh = serial_read_reg (DLHR);
+ serial_write_reg (DLHR, 0x55);
+ serial_write_reg (LCR, lcr);
+
+ ier = serial_read_reg (IER);
+ serial_write_reg (IER, 0x00);
+
+ if (serial_read_reg (IER) != 0x00)
+ return 1;
+
+ serial_write_reg (IER, ier);
+
+ serial_write_reg (LCR, lcr | LCR_DLAB);
+
+ if (serial_read_reg (DLHR) != 0x55)
+ return 1;
+
+ serial_write_reg (DLHR, 0xaa);
+
+ if (serial_read_reg (DLHR) != 0xaa)
+ return 1;
+
+ serial_write_reg (DLHR, dlh);
+ serial_write_reg (LCR, lcr);
+
+ return 0;
+}
+
+
+static void
+serial_set_baud (unsigned baud)
+{
+ uint32_t divisor = (BAUD_BASE >> 4) / baud;
+ uint8_t lcr;
+
+ lcr = serial_read_reg (LCR);
+ serial_write_reg (LCR, lcr | LCR_DLAB);
+
+ serial_write_reg (DLHR, divisor >> 8);
+ serial_write_reg (DLLR, divisor & 0xff);
+
+ serial_write_reg (LCR, lcr);
+}
+
+
+void
+serial_init (void)
+{
+
+ serial_write_reg (FCR, 0x6); /*disable FIFOs and reset */
+ serial_write_reg (IER, 0); /* no interrupts */
+
+ /* Clear all interrupts */
+ serial_read_reg (IIR);
+ serial_read_reg (MSR);
+ serial_read_reg (RXR);
+ serial_read_reg (LSR);
+
+ serial_set_baud (BAUD_RATE);
+
+ serial_write_reg (LCR, LCR_WS0 | LCR_WS1); /*8 bits, 1 stop bit, no parity */
+ serial_write_reg (MCR, MCR_RTS | MCR_DTR); /*rts and dtr on */
+}
+
+
+void
+serial_write (void *buf, size_t len)
+{
+/*
+ * If we were to use a real SC16IS7XX
+ * we'd not be able to use this special
+ * extra non-incrementing register
+ * and we'd also have to check the THRE
+ * bit first
+ */
+
+ serial_write_reg_buf (TXR_NOINC, buf, len);
+}
+
+
+
+/* main */
+
+int
+find_serial (void)
+{
+ unsigned i;
+
+ for (i = 0; i < IGFX_NUM_PORTS; ++i)
+ {
+ if (i2c_init_adapter (i))
+ continue;
+
+ printf ("Found active IGFX I2C bus %d\n", i);
+
+ if (serial_probe ())
+ continue;
+
+ printf ("Serial port found on IGFX I2C bus %d\n", i);
+ return 0;
+
+ }
+ printf ("Serial port not found\n");
+ return -1;
+}
+
+
+/* main */
+
+int
+main (int argc, char *argv[])
+{
+ char msg[] = "The quick brown fox jumps over the lazy dog\r\n";
+
+ iopl (3);
+
+ if (find_serial ())
+ return -1;
+
+ serial_init ();
+
+ serial_write (msg, sizeof (msg));
+
+ return 0;
+}
diff --git a/serial_over_speaker.c b/serial_over_speaker.c
new file mode 100644
index 0000000..9995123
--- /dev/null
+++ b/serial_over_speaker.c
@@ -0,0 +1,572 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <sys/io.h>
+
+#define BASE_CLK 1193180
+#define F 2200
+
+#define DIVISOR (BASE_CLK /F)
+
+#define PIT_MCR_CH2 (2UL << 6)
+#define PIT_MCR_AM_LOHI (3UL << 4)
+#define PIT_MCR_MODE0 (0UL << 1)
+#define PIT_MCR_MODE3 (3UL << 1)
+
+#define PIT_DATA_CH2 0x42
+#define PIT_MCR 0x43
+
+#define PORTB 0x61
+#define PORTB_SP_GATE (1 << 1)
+#define PORTB_SP_CH2_GATE (1 << 0)
+#define PORTB_SP_STATUS (1 << 5)
+
+static inline uint64_t
+rdtsc (void)
+{
+ uint32_t low, high;
+ __asm__ __volatile__ ("rdtsc":"=a" (low), "=d" (high));
+ return ((uint64_t) high << 32) | low;
+}
+
+static inline void
+sti (void)
+{
+ __asm__ __volatile__ ("sti");
+}
+
+static inline void
+cli (void)
+{
+ __asm__ __volatile__ ("cli");
+}
+
+static inline void
+out_8 (uint16_t port, uint8_t value)
+{
+ asm volatile ("outb %b0,%w1"::"a" (value), "Nd" (port));
+}
+
+
+static inline uint8_t
+in_8 (uint16_t port)
+{
+ uint8_t ret;
+ asm volatile ("inb %w1,%b0":"=a" (ret):"Nd" (port));
+ return ret;
+}
+
+
+static uint64_t t_f, t_b;
+static int p = 0, f = 0;
+static uint64_t tsc_baud, tsc_2f;
+static unsigned baud;
+
+static const char *varicode_fsk[] = {
+ "1010101011", /* 0 - <NUL> */
+ "1011011011", /* 1 - <SOH> */
+ "1011101101", /* 2 - <STX> */
+ "1101110111", /* 3 - <ETX> */
+ "1011101011", /* 4 - <EOT> */
+ "1101011111", /* 5 - <ENQ> */
+ "1011101111", /* 6 - <ACK> */
+ "1011111101", /* 7 - <BEL> */
+ "1011111111", /* 8 - <BS> */
+ "11101111", /* 9 - <TAB> */
+ "11101", /* 10 - <LF> */
+ "1101101111", /* 11 - <VT> */
+ "1011011101", /* 12 - <FF> */
+ "11111", /* 13 - <CR> */
+ "1101110101", /* 14 - <SO> */
+ "1110101011", /* 15 - <SI> */
+ "1011110111", /* 16 - <DLE> */
+ "1011110101", /* 17 - <DC1> */
+ "1110101101", /* 18 - <DC2> */
+ "1110101111", /* 19 - <DC3> */
+ "1101011011", /* 20 - <DC4> */
+ "1101101011", /* 21 - <NAK> */
+ "1101101101", /* 22 - <SYN> */
+ "1101010111", /* 23 - <ETB> */
+ "1101111011", /* 24 - <CAN> */
+ "1101111101", /* 25 - <EM> */
+ "1110110111", /* 26 - <SUB> */
+ "1101010101", /* 27 - <ESC> */
+ "1101011101", /* 28 - <FS> */
+ "1110111011", /* 29 - <GS> */
+ "1011111011", /* 30 - <RS> */
+ "1101111111", /* 31 - <US> */
+ "1", /* 32 - <SPC> */
+ "111111111", /* 33 - ! */
+ "101011111", /* 34 - '"' */
+ "111110101", /* 35 - # */
+ "111011011", /* 36 - $ */
+ "1011010101", /* 37 - % */
+ "1010111011", /* 38 - & */
+ "101111111", /* 39 - ' */
+ "11111011", /* 40 - ( */
+ "11110111", /* 41 - ) */
+ "101101111", /* 42 - * */
+ "111011111", /* 43 - + */
+ "1110101", /* 44 - , */
+ "110101", /* 45 - - */
+ "1010111", /* 46 - . */
+ "110101111", /* 47 - / */
+ "10110111", /* 48 - 0 */
+ "10111101", /* 49 - 1 */
+ "11101101", /* 50 - 2 */
+ "11111111", /* 51 - 3 */
+ "101110111", /* 52 - 4 */
+ "101011011", /* 53 - 5 */
+ "101101011", /* 54 - 6 */
+ "110101101", /* 55 - 7 */
+ "110101011", /* 56 - 8 */
+ "110110111", /* 57 - 9 */
+ "11110101", /* 58 - : */
+ "110111101", /* 59 - ; */
+ "111101101", /* 60 - < */
+ "1010101", /* 61 - = */
+ "111010111", /* 62 - > */
+ "1010101111", /* 63 - ? */
+ "1010111101", /* 64 - @ */
+ "1111101", /* 65 - A */
+ "11101011", /* 66 - B */
+ "10101101", /* 67 - C */
+ "10110101", /* 68 - D */
+ "1110111", /* 69 - E */
+ "11011011", /* 70 - F */
+ "11111101", /* 71 - G */
+ "101010101", /* 72 - H */
+ "1111111", /* 73 - I */
+ "111111101", /* 74 - J */
+ "101111101", /* 75 - K */
+ "11010111", /* 76 - L */
+ "10111011", /* 77 - M */
+ "11011101", /* 78 - N */
+ "10101011", /* 79 - O */
+ "11010101", /* 80 - P */
+ "111011101", /* 81 - Q */
+ "10101111", /* 82 - R */
+ "1101111", /* 83 - S */
+ "1101101", /* 84 - T */
+ "101010111", /* 85 - U */
+ "110110101", /* 86 - V */
+ "101011101", /* 87 - W */
+ "101110101", /* 88 - X */
+ "101111011", /* 89 - Y */
+ "1010101101", /* 90 - Z */
+ "111110111", /* 91 - [ */
+ "111101111", /* 92 - \ */
+ "111111011", /* 93 - ] */
+ "1010111111", /* 94 - ^ */
+ "101101101", /* 95 - _ */
+ "1011011111", /* 96 - ` */
+ "1011", /* 97 - a */
+ "1011111", /* 98 - b */
+ "101111", /* 99 - c */
+ "101101", /* 100 - d */
+ "11", /* 101 - e */
+ "111101", /* 102 - f */
+ "1011011", /* 103 - g */
+ "101011", /* 104 - h */
+ "1101", /* 105 - i */
+ "111101011", /* 106 - j */
+ "10111111", /* 107 - k */
+ "11011", /* 108 - l */
+ "111011", /* 109 - m */
+ "1111", /* 110 - n */
+ "111", /* 111 - o */
+ "111111", /* 112 - p */
+ "110111111", /* 113 - q */
+ "10101", /* 114 - r */
+ "10111", /* 115 - s */
+ "101", /* 116 - t */
+ "110111", /* 117 - u */
+ "1111011", /* 118 - v */
+ "1101011", /* 119 - w */
+ "11011111", /* 120 - x */
+ "1011101", /* 121 - y */
+ "111010101", /* 122 - z */
+ "1010110111", /* 123 - { */
+ "110111011", /* 124 - | */
+ "1010110101", /* 125 - } */
+ "1011010111", /* 126 - ~ */
+ "1110110101", /* 127 - <DEL> */
+ "1110111101", /* 128 - */
+ "1110111111", /* 129 - */
+ "1111010101", /* 130 - */
+ "1111010111", /* 131 - */
+ "1111011011", /* 132 - */
+ "1111011101", /* 133 - */
+ "1111011111", /* 134 - */
+ "1111101011", /* 135 - */
+ "1111101101", /* 136 - */
+ "1111101111", /* 137 - */
+ "1111110101", /* 138 - */
+ "1111110111", /* 139 - */
+ "1111111011", /* 140 - */
+ "1111111101", /* 141 - */
+ "1111111111", /* 142 - */
+ "10101010101", /* 143 - */
+ "10101010111", /* 144 - */
+ "10101011011", /* 145 - */
+ "10101011101", /* 146 - */
+ "10101011111", /* 147 - */
+ "10101101011", /* 148 - */
+ "10101101101", /* 149 - */
+ "10101101111", /* 150 - */
+ "10101110101", /* 151 - */
+ "10101110111", /* 152 - */
+ "10101111011", /* 153 - */
+ "10101111101", /* 154 - */
+ "10101111111", /* 155 - */
+ "10110101011", /* 156 - */
+ "10110101101", /* 157 - */
+ "10110101111", /* 158 - */
+ "10110110101", /* 159 - */
+ "10110110111", /* 160 - */
+ "10110111011", /* 161 - */
+ "10110111101", /* 162 - */
+ "10110111111", /* 163 - */
+ "10111010101", /* 164 - */
+ "10111010111", /* 165 - */
+ "10111011011", /* 166 - */
+ "10111011101", /* 167 - */
+ "10111011111", /* 168 - */
+ "10111101011", /* 169 - */
+ "10111101101", /* 170 - */
+ "10111101111", /* 171 - */
+ "10111110101", /* 172 - */
+ "10111110111", /* 173 - */
+ "10111111011", /* 174 - */
+ "10111111101", /* 175 - */
+ "10111111111", /* 176 - */
+ "11010101011", /* 177 - */
+ "11010101101", /* 178 - */
+ "11010101111", /* 179 - */
+ "11010110101", /* 180 - */
+ "11010110111", /* 181 - */
+ "11010111011", /* 182 - */
+ "11010111101", /* 183 - */
+ "11010111111", /* 184 - */
+ "11011010101", /* 185 - */
+ "11011010111", /* 186 - */
+ "11011011011", /* 187 - */
+ "11011011101", /* 188 - */
+ "11011011111", /* 189 - */
+ "11011101011", /* 190 - */
+ "11011101101", /* 191 - */
+ "11011101111", /* 192 - */
+ "11011110101", /* 193 - */
+ "11011110111", /* 194 - */
+ "11011111011", /* 195 - */
+ "11011111101", /* 196 - */
+ "11011111111", /* 197 - */
+ "11101010101", /* 198 - */
+ "11101010111", /* 199 - */
+ "11101011011", /* 200 - */
+ "11101011101", /* 201 - */
+ "11101011111", /* 202 - */
+ "11101101011", /* 203 - */
+ "11101101101", /* 204 - */
+ "11101101111", /* 205 - */
+ "11101110101", /* 206 - */
+ "11101110111", /* 207 - */
+ "11101111011", /* 208 - */
+ "11101111101", /* 209 - */
+ "11101111111", /* 210 - */
+ "11110101011", /* 211 - */
+ "11110101101", /* 212 - */
+ "11110101111", /* 213 - */
+ "11110110101", /* 214 - */
+ "11110110111", /* 215 - */
+ "11110111011", /* 216 - */
+ "11110111101", /* 217 - */
+ "11110111111", /* 218 - */
+ "11111010101", /* 219 - */
+ "11111010111", /* 220 - */
+ "11111011011", /* 221 - */
+ "11111011101", /* 222 - */
+ "11111011111", /* 223 - */
+ "11111101011", /* 224 - */
+ "11111101101", /* 225 - */
+ "11111101111", /* 226 - */
+ "11111110101", /* 227 - */
+ "11111110111", /* 228 - */
+ "11111111011", /* 229 - */
+ "11111111101", /* 230 - */
+ "11111111111", /* 231 - */
+ "101010101011", /* 232 - */
+ "101010101101", /* 233 - */
+ "101010101111", /* 234 - */
+ "101010110101", /* 235 - */
+ "101010110111", /* 236 - */
+ "101010111011", /* 237 - */
+ "101010111101", /* 238 - */
+ "101010111111", /* 239 - */
+ "101011010101", /* 240 - */
+ "101011010111", /* 241 - */
+ "101011011011", /* 242 - */
+ "101011011101", /* 243 - */
+ "101011011111", /* 244 - */
+ "101011101011", /* 245 - */
+ "101011101101", /* 246 - */
+ "101011101111", /* 247 - */
+ "101011110101", /* 248 - */
+ "101011110111", /* 249 - */
+ "101011111011", /* 250 - */
+ "101011111101", /* 251 - */
+ "101011111111", /* 252 - */
+ "101101010101", /* 253 - */
+ "101101010111", /* 254 - */
+ "101101011011" /* 255 - */
+};
+
+static void
+program_pit_ch2 (uint32_t divisor, uint8_t mode)
+{
+
+ out_8 (PIT_MCR, PIT_MCR_CH2 | PIT_MCR_AM_LOHI | mode);
+
+ out_8 (PIT_DATA_CH2, divisor & 0xff);
+ out_8 (PIT_DATA_CH2, divisor >> 8);
+}
+
+
+static void
+set_mask (int mask, uint8_t what)
+{
+ uint8_t v;
+
+ v = in_8 (PORTB);
+
+ if (mask)
+ v &= ~(what);
+ else
+ v |= what;
+
+ out_8 (PORTB, v);
+}
+
+static void
+count_cycles (unsigned num)
+{
+
+ while (num--)
+ {
+ while (!(in_8 (PORTB) & PORTB_SP_STATUS));
+ while (in_8 (PORTB) & PORTB_SP_STATUS);
+ }
+
+}
+
+
+
+static void
+give_to_pit (void)
+{
+ uint64_t t;
+
+ set_mask (1, PORTB_SP_CH2_GATE);
+ program_pit_ch2 (DIVISOR, PIT_MCR_MODE3);
+
+
+ for (;;)
+ {
+ t = rdtsc ();
+
+ if (t > t_f)
+ {
+ t_f += tsc_2f;
+ f = !f;
+
+ if (f ^ p)
+ {
+ set_mask (1, PORTB_SP_GATE);
+ set_mask (0, PORTB_SP_CH2_GATE);
+ set_mask (0, PORTB_SP_GATE);
+ return;
+ }
+ else
+ {
+ set_mask (0, PORTB_SP_GATE);
+ }
+ }
+ }
+
+}
+
+
+void
+take_from_pit (void)
+{
+ uint64_t t;
+
+ t = rdtsc ();
+
+ while (t_b < t)
+ t_b += tsc_baud;
+
+ while (!(in_8 (PORTB) & PORTB_SP_STATUS)); /*Low */
+ while ((in_8 (PORTB) & PORTB_SP_STATUS)); /*High */
+ t_f = rdtsc ();
+ set_mask (1, PORTB_SP_GATE | PORTB_SP_CH2_GATE);
+
+ t_f += tsc_2f;
+
+ while (t_b < t_f)
+ t_b += tsc_baud;
+}
+
+
+static void
+start (void)
+{
+/* This gets OUT2 from the 8254 high*/
+ set_mask (1, PORTB_SP_CH2_GATE);
+ t_b = t_f = rdtsc ();
+}
+
+
+
+
+static void
+send_bit_raw (int b)
+{
+ uint64_t t;
+
+ if (!b)
+ p = !p;
+
+ t_b += tsc_baud;
+
+ while ((t = rdtsc ()) < t_b)
+ {
+ if (t > t_f)
+ {
+ t_f += tsc_2f;
+ f = !f;
+ set_mask (f ^ p, PORTB_SP_GATE);
+ }
+ }
+
+}
+
+static void
+send_bit (int b)
+{
+ send_bit_raw (b);
+}
+
+
+static void
+stop (void)
+{
+ set_mask (1, PORTB_SP_GATE | PORTB_SP_CH2_GATE);
+}
+
+
+static void
+send_sync (int bits, int bit)
+{
+
+ if (bit == 2)
+ {
+ bits >>= 1;
+
+ while (bits--)
+ {
+ send_bit (1);
+ send_bit (0);
+ }
+ }
+ else
+ {
+ while (bits--)
+ send_bit (bit);
+ }
+}
+
+static void
+send_char (uint8_t c)
+{
+ const char *v = varicode_fsk[c];
+
+ if (!v)
+ return;
+
+ while (*v)
+ send_bit (*(v++) - '0');
+
+ send_bit (0);
+ send_bit (0);
+}
+
+
+void
+modem_xmit (void *_buf, size_t buf_len)
+{
+ uint8_t *buf = _buf;
+ take_from_pit ();
+
+ send_sync (baud / 5, 0);
+ send_char (0);
+
+ while (buf_len--)
+ send_char (*(buf++));
+
+ give_to_pit ();
+}
+
+
+
+void
+modem_on (unsigned _baud)
+{
+ uint64_t tsc, tsc_start;
+
+ baud = _baud;
+
+ program_pit_ch2 (DIVISOR, PIT_MCR_MODE3);
+ set_mask (0, PORTB_SP_GATE | PORTB_SP_CH2_GATE);
+
+ count_cycles (10);
+ tsc_start = rdtsc ();
+ count_cycles (F);
+ tsc = rdtsc ();
+
+ tsc -= tsc_start;
+
+ tsc_baud = (tsc / baud);
+ tsc_2f = (tsc / (2 * F));
+
+
+ start ();
+ send_sync (baud * 2, 0);
+
+ give_to_pit ();
+}
+
+void
+modem_off (void)
+{
+ take_from_pit ();
+ send_sync (150, 1);
+ stop ();
+}
+
+int
+main (int argc, char *argv[])
+{
+ char msg[] = "The quick brown fox jumps over the lazy dog\r\n";
+
+ iopl (3);
+ cli ();
+
+ modem_on (125);
+ modem_xmit (msg, sizeof (msg));
+ modem_off ();
+
+ sti ();
+
+ return 0;
+}
diff --git a/stm32f1/serial_over_dp.hex b/stm32f1/serial_over_dp.hex
new file mode 100644
index 0000000..f5b5406
--- /dev/null
+++ b/stm32f1/serial_over_dp.hex
@@ -0,0 +1,1043 @@
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diff --git a/stm32f1/usbdfu.hex b/stm32f1/usbdfu.hex
new file mode 100644
index 0000000..4ba13a6
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