diff options
Diffstat (limited to 'PCB/Testers/OSO-SWAT-B2-00/OSO-SWAT-B2-00.pretty/FH19C9S05SH10.kicad_mod')
-rw-r--r-- | PCB/Testers/OSO-SWAT-B2-00/OSO-SWAT-B2-00.pretty/FH19C9S05SH10.kicad_mod | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/PCB/Testers/OSO-SWAT-B2-00/OSO-SWAT-B2-00.pretty/FH19C9S05SH10.kicad_mod b/PCB/Testers/OSO-SWAT-B2-00/OSO-SWAT-B2-00.pretty/FH19C9S05SH10.kicad_mod new file mode 100644 index 00000000..c01aa551 --- /dev/null +++ b/PCB/Testers/OSO-SWAT-B2-00/OSO-SWAT-B2-00.pretty/FH19C9S05SH10.kicad_mod @@ -0,0 +1,47 @@ +(footprint "FH19C9S05SH10" (version 20211014) (generator pcbnew) + (layer "F.Cu") + (tedit 0) + (descr "<b>FH19C-9S-0.5SH(10)-1</b><br>\n") + (fp_text reference "REF**" (at 0 -1.425) (layer "B.SilkS") + (effects (font (size 1.1684 1.1684) (thickness 0.1016))) + (tstamp 5c9202d7-6a93-43b3-87c0-77347fd72885) + ) + (fp_text value ">VALUE" (at 0 -1.425) (layer "B.Fab") + (effects (font (size 1.1684 1.1684) (thickness 0.1016))) + (tstamp 628f0a9f-12ce-4a6a-8ea2-8c2cdfc4161e) + ) + (fp_line (start 2.75 -2.25) (end 3.25 -2.25) (layer "B.SilkS") (width 0.1) (tstamp 0a2d185c-629f-461f-8b6b-f91f1894e6ba)) + (fp_line (start 3.25 -2.25) (end 3.25 -0.75) (layer "B.SilkS") (width 0.1) (tstamp 17adff9d-c581-42e4-b552-035b922b5256)) + (fp_line (start -3.25 -2.25) (end -3.25 -0.75) (layer "B.SilkS") (width 0.1) (tstamp 414a1d4c-7afc-4ffa-8579-88675cedc4ce)) + (fp_line (start -3.25 0.75) (end 3.25 0.75) (layer "B.SilkS") (width 0.1) (tstamp 8e6e5f4d-6567-459b-ac23-dfc1d101e708)) + (fp_line (start -2.75 -2.25) (end -3.25 -2.25) (layer "B.SilkS") (width 0.1) (tstamp e47d9cf3-579e-4750-bc6d-bf58b55862bb)) + (fp_arc (start -2.357 -2.572) (mid -2.407 -2.522) (end -2.457 -2.572) (layer "B.SilkS") (width 0.2) (tstamp 0a52fedd-967a-423d-aaaf-3875f20f935b)) + (fp_arc (start -2.457 -2.572) (mid -2.407 -2.622) (end -2.357 -2.572) (layer "B.SilkS") (width 0.2) (tstamp 199ade13-7442-4da9-8eea-a8e7681e2aee)) + (fp_arc (start -2.457 -2.572) (mid -2.407 -2.622) (end -2.357 -2.572) (layer "B.SilkS") (width 0.2) (tstamp 5684e95c-6824-46cf-8e72-881178a51d31)) + (fp_line (start -3.25 -2.25) (end 3.25 -2.25) (layer "B.Fab") (width 0.2) (tstamp 0dcb5ab5-f291-489d-b2bc-0f0b25b801ee)) + (fp_line (start 3.25 -2.25) (end 3.25 0.75) (layer "B.Fab") (width 0.2) (tstamp 30b75c25-1d2c-45e7-83e2-bb3be98f8f83)) + (fp_line (start 3.25 0.75) (end -3.25 0.75) (layer "B.Fab") (width 0.2) (tstamp 44cd273f-f3a1-4b9a-83a6-972b276409e1)) + (fp_line (start -3.25 0.75) (end -3.25 -2.25) (layer "B.Fab") (width 0.2) (tstamp 5daf2c3c-7702-4a59-b99d-84464c054bc4)) + (pad "1" smd rect (at -2 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 12481f4a-71b0-43a4-a69b-bc048ed999f0)) + (pad "2" smd rect (at -1.5 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 604495b3-3885-49af-8442-bcf3d7361dc4)) + (pad "3" smd rect (at -1 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 6f13bfbf-7f19-4b33-9de2-b8c15c8c88ee)) + (pad "4" smd rect (at -0.5 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 9959c68a-7d2a-4f14-b245-3548992673f3)) + (pad "5" smd rect (at 0 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 321eb03e-d5d7-4c98-9326-4c49d56670ae)) + (pad "6" smd rect (at 0.5 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 08fa8ff6-09a7-484c-b1d9-0e3b7c49bb26)) + (pad "7" smd rect (at 1 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 65e58d89-f213-4051-b36b-7b3454867ad5)) + (pad "8" smd rect (at 1.5 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 9d541d6f-313d-4469-a000-68242c1dd6d6)) + (pad "9" smd rect (at 2 -2.5 90) (size 0.8 0.3) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 01422660-08c8-48f3-98ca-26cbe7f98f5b)) + (pad "MP1" smd rect (at -3 0 90) (size 0.8 0.4) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp baaf14d0-0c5c-4bf0-82d7-5ee71082500d)) + (pad "MP2" smd rect (at 3 0 90) (size 0.8 0.4) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 7410568a-af90-4a4e-a67d-5fd1863e0d95)) +) |