1 files changed, 60 insertions, 0 deletions
diff --git a/PCB/Testers/OSO-SWAT-B2-00/OSO-FEAL-A1-00.pretty/SOT23-5.kicad_mod b/PCB/Testers/OSO-SWAT-B2-00/OSO-FEAL-A1-00.pretty/SOT23-5.kicad_mod
new file mode 100644
index 00000000..51221319
--- /dev/null
+++ b/PCB/Testers/OSO-SWAT-B2-00/OSO-FEAL-A1-00.pretty/SOT23-5.kicad_mod
@@ -0,0 +1,60 @@
+(footprint "SOT23-5" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 0)
+  (descr "<b>Small Outline Transistor</b> - 5 Pin")
+  (fp_text reference "REF**" (at 1.978 0) (layer "F.SilkS")
+    (effects (font (size 0.666496 0.666496) (thickness 0.146304)) (justify left bottom))
+    (tstamp a3d803a8-16ce-4cc0-98c0-335b4791ca73)
+  )
+  (fp_text value ">VALUE" (at 1.978 0.635) (layer "F.Fab")
+    (effects (font (size 0.36576 0.36576) (thickness 0.04064)) (justify left bottom))
+    (tstamp c13d60a6-9f29-4d7d-a3fb-19f5770e9065)
+  )
+  (fp_line (start -0.4 -1.05) (end 0.4 -1.05) (layer "F.SilkS") (width 0.2032) (tstamp 08de26f8-b1ba-4ff5-a0e0-d7180004aab5))
+  (fp_line (start 1.65 -0.8) (end 1.65 0.8) (layer "F.SilkS") (width 0.2032) (tstamp 14171288-2ea9-4336-9f22-45e981528a28))
+  (fp_line (start -1.65 -0.8) (end -1.65 0.8) (layer "F.SilkS") (width 0.2032) (tstamp 857482e4-83e7-4786-8116-b6171859ea7c))
+  (fp_line (start -1.4224 0.8104) (end -1.4224 -0.8104) (layer "F.Fab") (width 0.2032) (tstamp 54c9723f-e64b-4d72-b1c0-245edb65d8ad))
+  (fp_line (start -1.4224 -0.8104) (end 1.4224 -0.8104) (layer "F.Fab") (width 0.2032) (tstamp 6805920d-a2e7-4494-939c-d98b587c96d0))
+  (fp_line (start 1.4224 0.8104) (end -1.4224 0.8104) (layer "F.Fab") (width 0.2032) (tstamp 86e09b0b-9d9e-4222-a862-96f30fc4bf42))
+  (fp_line (start 1.4224 -0.8104) (end 1.4224 0.8104) (layer "F.Fab") (width 0.2032) (tstamp abe36c92-81ed-456a-abc0-642dfecbdb34))
+  (fp_poly (pts
+      (xy -1.2 -0.85)
+      (xy -0.7 -0.85)
+      (xy -0.7 -1.5)
+      (xy -1.2 -1.5)
+    ) (layer "F.Fab") (width 0) (fill solid) (tstamp 6aff99b3-0af2-4f75-8219-c242678f2923))
+  (fp_poly (pts
+      (xy 0.7 -0.85)
+      (xy 1.2 -0.85)
+      (xy 1.2 -1.5)
+      (xy 0.7 -1.5)
+    ) (layer "F.Fab") (width 0) (fill solid) (tstamp 82d1128c-b553-45de-9649-31220492857c))
+  (fp_poly (pts
+      (xy -0.25 1.5)
+      (xy 0.25 1.5)
+      (xy 0.25 0.85)
+      (xy -0.25 0.85)
+    ) (layer "F.Fab") (width 0) (fill solid) (tstamp b68922d3-d7bc-4a97-8a9b-74840f074a00))
+  (fp_poly (pts
+      (xy -1.2 1.5)
+      (xy -0.7 1.5)
+      (xy -0.7 0.85)
+      (xy -1.2 0.85)
+    ) (layer "F.Fab") (width 0) (fill solid) (tstamp d79b8709-10f3-407b-a8e1-7bcaab1f68d3))
+  (fp_poly (pts
+      (xy 0.7 1.5)
+      (xy 1.2 1.5)
+      (xy 1.2 0.85)
+      (xy 0.7 0.85)
+    ) (layer "F.Fab") (width 0) (fill solid) (tstamp f172ee83-5615-439a-9099-9f06023a7040))
+  (pad "1" smd rect (at -0.95 1.3001) (size 0.55 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0381) (tstamp 5a380b35-9745-437f-8457-0f67dcd910fe))
+  (pad "2" smd rect (at 0 1.3001) (size 0.55 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0381) (tstamp 9f39fb3d-571e-4e18-b567-d269e1a279fa))
+  (pad "3" smd rect (at 0.95 1.3001) (size 0.55 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0381) (tstamp 667fcc1e-78cf-4001-9d30-2b04c33f0724))
+  (pad "4" smd rect (at 0.95 -1.3001) (size 0.55 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0381) (tstamp 1544d271-63fd-45e4-bae4-4e8d17302463))
+  (pad "5" smd rect (at -0.95 -1.3001) (size 0.55 1.2) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0381) (tstamp 688ff897-2cb0-401e-865a-3ca778bd529f))
+)