diff options
Diffstat (limited to 'PCB/Testers/OSO-SWAT-A2-00/OSO-SWAT-A2-00.pretty/SOT65P210X110-5N.kicad_mod')
-rw-r--r-- | PCB/Testers/OSO-SWAT-A2-00/OSO-SWAT-A2-00.pretty/SOT65P210X110-5N.kicad_mod | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/PCB/Testers/OSO-SWAT-A2-00/OSO-SWAT-A2-00.pretty/SOT65P210X110-5N.kicad_mod b/PCB/Testers/OSO-SWAT-A2-00/OSO-SWAT-A2-00.pretty/SOT65P210X110-5N.kicad_mod new file mode 100644 index 00000000..0d9bebed --- /dev/null +++ b/PCB/Testers/OSO-SWAT-A2-00/OSO-SWAT-A2-00.pretty/SOT65P210X110-5N.kicad_mod @@ -0,0 +1,30 @@ +(footprint "SOT65P210X110-5N" (version 20211014) (generator pcbnew) + (layer "F.Cu") + (tedit 0) + (fp_text reference "REF**" (at -1.8 -1.4) (layer "B.SilkS") + (effects (font (size 0.747776 0.747776) (thickness 0.065024)) (justify left bottom)) + (tstamp 3bc24d10-b3eb-4abe-836d-a8521ccc4341) + ) + (fp_text value ">VALUE" (at -1.8 1.4) (layer "B.Fab") + (effects (font (size 0.747776 0.747776) (thickness 0.065024)) (justify left top)) + (tstamp dd552f19-e379-4dd5-a10b-882b6c8e7a65) + ) + (fp_line (start 0.625 -1.17) (end -0.625 -1.17) (layer "B.SilkS") (width 0.127) (tstamp 8dcf40e6-09a5-42e4-8b46-f4738540468d)) + (fp_line (start -0.625 1.17) (end 0.625 1.17) (layer "B.SilkS") (width 0.127) (tstamp a8cdda0e-7b06-4b92-8078-341b4e32614a)) + (fp_circle (center -2.1 -0.9) (end -2 -0.9) (layer "B.SilkS") (width 0.2) (fill none) (tstamp a2d090b5-bdc2-4863-87f2-2ea46a246d3d)) + (fp_line (start 0.625 1.0125) (end 0.625 -1.0125) (layer "B.Fab") (width 0.127) (tstamp 6476e233-d260-45fe-84d2-9ade7d0003a0)) + (fp_line (start 0.625 -1.0125) (end -0.625 -1.0125) (layer "B.Fab") (width 0.127) (tstamp a29e1299-22c5-4fd2-9a37-e405785962a9)) + (fp_line (start -0.625 -1.0125) (end -0.625 1.0125) (layer "B.Fab") (width 0.127) (tstamp bc408f2c-2338-4a2e-9d30-e90fd4d4f487)) + (fp_line (start -0.625 1.0125) (end 0.625 1.0125) (layer "B.Fab") (width 0.127) (tstamp fdd41a68-206a-4076-b64a-8b7633d428d6)) + (fp_circle (center -2.1 -0.9) (end -2 -0.9) (layer "B.Fab") (width 0.2) (fill none) (tstamp 3497045f-d218-47c9-8fd1-2d0a39585aa6)) + (pad "1" smd rect (at -0.97 -0.65) (size 1.17 0.4) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp d6cc98ff-7d68-4734-afa1-c7dd225e08d3)) + (pad "2" smd rect (at -0.97 0) (size 1.17 0.4) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 90207e9d-650a-4c45-b7d5-e506cc85537d)) + (pad "3" smd rect (at -0.97 0.65) (size 1.17 0.4) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp efd79052-e146-4d61-9e0a-ba764a5a966b)) + (pad "4" smd rect (at 0.97 0.65) (size 1.17 0.4) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp 84315919-677c-4909-a747-2c92c96d5870)) + (pad "5" smd rect (at 0.97 -0.65) (size 1.17 0.4) (layers "B.Cu" "B.Paste" "B.Mask") + (solder_mask_margin 0.0635) (tstamp cd8c6c53-febf-40c1-af77-5373add0fde7)) +) |