summaryrefslogtreecommitdiffstats
path: root/PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/SOD-323_MINI.kicad_mod
diff options
context:
space:
mode:
Diffstat (limited to 'PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/SOD-323_MINI.kicad_mod')
-rw-r--r--PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/SOD-323_MINI.kicad_mod32
1 files changed, 32 insertions, 0 deletions
diff --git a/PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/SOD-323_MINI.kicad_mod b/PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/SOD-323_MINI.kicad_mod
new file mode 100644
index 00000000..575928a6
--- /dev/null
+++ b/PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/SOD-323_MINI.kicad_mod
@@ -0,0 +1,32 @@
+(footprint "SOD-323_MINI" (version 20211014) (generator pcbnew)
+ (layer "F.Cu")
+ (tedit 0)
+ (fp_text reference "REF**" (at -1.1 -1) (layer "F.SilkS")
+ (effects (font (size 0.666496 0.666496) (thickness 0.146304)) (justify left bottom))
+ (tstamp 822aae42-7f45-4dd3-b7c4-3ccbe7103b19)
+ )
+ (fp_text value ">VALUE" (at -1.1 1.792) (layer "F.Fab")
+ (effects (font (size 0.36576 0.36576) (thickness 0.04064)) (justify left bottom))
+ (tstamp e0f315c3-6700-479a-9de3-20a18f646ebb)
+ )
+ (fp_line (start 1 0.7) (end -1 0.7) (layer "F.SilkS") (width 0.2032) (tstamp 1c83e5ac-d83a-4a44-ae96-f136ad686fc1))
+ (fp_line (start -0.25 0) (end 0.35 -0.4) (layer "F.SilkS") (width 0.2032) (tstamp 72b9b565-fb3a-48a1-aa3b-cec6e8ea88d6))
+ (fp_line (start 0.35 0.4) (end -0.25 0) (layer "F.SilkS") (width 0.2032) (tstamp 917685a3-77b1-4dcf-840c-dbf3fe547a8b))
+ (fp_line (start 0.35 -0.4) (end 0.35 0.4) (layer "F.SilkS") (width 0.2032) (tstamp ab977047-f988-4e80-924b-7789da5fc377))
+ (fp_line (start -1 -0.7) (end 1 -0.7) (layer "F.SilkS") (width 0.2032) (tstamp e213ccc7-a697-4570-83b4-b2ca699d0674))
+ (fp_poly (pts
+ (xy 0.3016 0.389841)
+ (xy -0.283162 0)
+ (xy 0.3016 -0.389841)
+ ) (layer "F.SilkS") (width 0) (fill solid) (tstamp 74d3b678-f0ec-4a8e-aacb-1f53199de01c))
+ (fp_poly (pts
+ (xy -0.45 0.5)
+ (xy -0.25 0.5)
+ (xy -0.25 -0.5)
+ (xy -0.45 -0.5)
+ ) (layer "F.SilkS") (width 0) (fill solid) (tstamp eabd8e13-cfdd-457f-bc6d-8ffe9e59878c))
+ (pad "A" smd rect (at 1.07 0) (size 0.9 0.8) (layers "F.Cu" "F.Paste" "F.Mask")
+ (solder_mask_margin 0.0508) (tstamp f1d8c3e6-5f7a-4d87-8dc9-e640513eed21))
+ (pad "C" smd rect (at -1.07 0) (size 0.9 0.8) (layers "F.Cu" "F.Paste" "F.Mask")
+ (solder_mask_margin 0.0508) (tstamp 25693a16-b2fc-4d5f-9399-629dd6b319ae))
+)